Select Publications

by Dr Hui Wu

Journal articles

Di P; Wu H; Xue J; Wang F; Yang C, 2012, ' Parallelizing SOR for GPGPUs using alternate loop tiling', Parallel Computing, vol. 38, no. 6-7, pp. 310 - 328, http://dx.doi.org/10.1016/j.parco.2012.03.004

Hui W; Wei-Ngan C; Jaffar J, 2002, ' An efficient distributed deadlock avoidance algorithm for the AND model', IEEE Transactions on Software Engineering, vol. 28, no. 1, pp. 18 - 29, http://dx.doi.org/10.1109/32.979987

Conference Papers

Zhang X; Sun H; Wu H, 2013, 'Register allocation by incremental graph colouring for clustered VLIW processors', in Proceedings - 12th IEEE International Conference on Trust, Security and Privacy in Computing and Communications, TrustCom 2013, pp. 927 - 934, presented at , http://dx.doi.org/10.1109/TrustCom.2013.113

Wu H; Mahmud S, 2012, 'A 2-approximation algorithm for optimal deployment of k base stations in WSNs', in Lecture Notes in Computer Science, Springer Berlin Heidelberg, Prague, Czech Republic, pp. 378 - 391, presented at 11th International IFIP TC 6 Networking Conference, NETWORKING 2012, Prague, 21 - 25 May 2012, http://dx.doi.org/10.1007/978-3-642-30054-7_30

Wan Q; Wu H; Xue J, 2012, 'WCET-aware data selection and allocation for scratchpad memory', in ACM SIGPLAN Notices, pp. 41 - 50, presented at

Mahmud S; Wu H; Xue J, 2011, 'Efficient energy balancing aware multiple base station deployment for WSNs', in Wireless Sensor Networks - 8th European Conference, EWSN 2011, Proceedings, Springer Verlag, Heidelberg, Germany, pp. 179 - 194, presented at 8th European Conference on Wireless Sensor Networks, EWSN 2011, Bonn, Germany, 23 - 25 February 2011, http://dx.doi.org/10.1007/978-3-642-19186-2_12

Li L; Wu H; Feng H; Xue J, 2007, 'Towards data tiling for whole programs in scratchpad memory allocation', in 12th Asia-Pacific computer systems architecture conference, presented at 12th Asia-Pacific computer systems architecture conference, Korea, 22 - 25 August 2007

Wu H; Parameswaran S, 2006, 'Minimising the energy consumption of real-time tasks with precedence constraints on a single processor', in Embedded and ubiquitous computing 2006, presented at Embedded and ubiquitous computing 2006, Seoul, South Korea, 1 - 4 August 2006

Wu H; Jaffar J; Xue J, 2006, 'Instruction scheduling with release times and deadlines on ILP processors', in 12th IEEE international conference on embedded and real-time computing systems, presented at 12th IEEE international conference on embedded and real-time computing systems, Sydney, 16 - 18 August 2006

Wu H; Jaffar J, 2002, 'Two Processor Scheduling with Real Release Times and Deadlines', in 14th International ACM Symposium on Parallel Algorithms and Architectures, presented at 14th International ACM Symposium on Parallel Algorithms and Architectures, Winnipeg, Canada, 11 - 13 August 2002

Wu H; Jaffar J, 2001, 'An Efficient Algorithm for Scheduling Instructions with Deadline Constraints on ILP Processors', in 22nd IEEE Real-TIme Symposium, presented at 22nd IEEE Real-TIme Symposium, London, England, 2 - 5 December 2001

Wu H; Jaffar J; Yap R, 2001, 'Instruction Scheduling with Timing Constraints on a Single RISC processor with 0/1 Latencies', in 6th International Conference on Principles and Practice of Constraints Programming, presented at 6th International Conference on Principles and Practice of Constraints Programming, Singapore, 18 - 21 September 2000

Wu H; Jaffar J; Yap R, 2000, 'A Fast Algorithm for Scheduling Instructions with Deadline Constraints on RISC Machines', in 2000 International Conference on Parallel Architectures and Compilation Techniques, presented at International Conference on Parallel Architectures and Compilation Techniques 2000, Philadelphia, Pennsylvania, 15 - 19 October 2000


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