Select Publications

by Professor Jingling Xue

Books

Xue J, 2000, Loop Tiling for Parallelism, Kluwer Academic Publishers, Boston

Book Chapters

Xue J; Huang Q, 2006, 'Code tiling: one size fits all', in Yang L; Guo M (ed.), High-performance computing: paradigm and infrastructure, edn. 1, Wiley & Sons, USA, pp. 219 - 240

Journal articles

Sui Y; Ye S; Xue J; Zhang J, 2013, ' Making context-sensitive inclusion-based pointer analysis practical for compilers using parameterised summarisation', Software: Practice and Experience, pp. n/a - n/a, http://dx.doi.org/10.1002/spe.2214

Yang C-Q; Wu Q; Tang T; Wang F; Xue J-L, 2013, ' Programming for scientific computing on peta-scale heterogeneous parallel systems', Journal of Central South University, vol. 20, no. 5, pp. 1189 - 1203, http://dx.doi.org/10.1007/s11771-013-1602-z

Zhang X; Wu H; Xue J, 2013, ' Instruction scheduling with k-successor tree for clustered VLIW processors', Design Automation for Embedded Systems, http://dx.doi.org/10.1007/s10617-012-9103-0

Franke B; Xue J, 2013, 'Foreword', Proceedings of the ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES)

Li J; Xue J; Xie X; Wan Q; Tan Q; Tan L, 2013, ' Epipe: A low-cost fault-tolerance technique considering WCET constraints', Journal of Systems Architecture, vol. 59, no. 10, pp. 1383 - 1393, http://dx.doi.org/10.1016/j.sysarc.2013.06.003

Franke B; Xue J, 2013, 'Foreword', ACM SIGPLAN Notices, vol. 48, no. 5

Di P; Wu H; Xue J; Wang F; Yang C, 2012, ' Parallelizing SOR for GPGPUs using alternate loop tiling', Parallel Computing, vol. 38, no. 6-7, pp. 310 - 328, http://dx.doi.org/10.1016/j.parco.2012.03.004

Lu Y; Potter J; Xue J, 2012, 'Ownership types for object synchronisation', Lecture Notes in Computer Science, vol. 7705 LNCS, pp. 18 - 33, http://dx.doi.org/10.1007/978-3-642-35182-2_3

Guan Y; Xue J, 2011, 'Leakage-aware modulo scheduling for embedded VLIW processors', Journal of Computer Science and Technology, vol. 26, no. 3, pp. 405 - 417, http://dx.doi.org/10.1007/s11390-011-1143-6

Gao L; Ngai T; Xue J, 2010, 'Loop Recreation for Thread-Level Speculation on Multicore Processors', Software: Practice and Experience, vol. 40, no. 1, pp. 45 - 72, http://dx.doi.org/10.1002/spe.v40:1

Yang X; Wang L; Deng Y; Zhang Y; Xue J, 2009, 'Comparability graph coloring for optimizing utilization of stream register files in stream processors', Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP, pp. 111 - 120, http://dx.doi.org/10.1145/1504176.1504195

Gao L; Xue J; Ngai T-F, 2009, ' Loop recreation for thread-level speculation on multicore processors', Software: Practice and Experience, pp. n/a - n/a, http://dx.doi.org/10.1002/spe.947

Li L; Feng H; Xue J, 2009, ' Compiler-directed scratchpad memory management via graph coloring', ACM Transactions on Architecture and Code Optimization, vol. 6, no. 3, pp. 1 - 17, http://dx.doi.org/10.1145/1582710.1582711

Mi W; Feng X-B; Jia Y-C; Chen L; Xue J-L, 2009, ' PARBLO: Page-Allocation-Based DRAM Row Buffer Locality Optimization', Journal of Computer Science and Technology, vol. 24, no. 6, pp. 1086 - 1097, http://dx.doi.org/10.1007/s11390-009-9297-1

Scholz B; Burgstaller B; Xue J, 2008, ' Minimal placement of bank selection instructions for partitioned memory architectures', ACM Transactions on Embedded Computing Systems, vol. 7, no. 2, pp. 1 - 32, http://dx.doi.org/10.1145/1331331.1331336

Xue J; Guo M; Wei D, 2008, ' Improving the parallelism of iterative methods by aggressive loop fusion', Journal of Supercomputing, vol. 43, no. 2, pp. 147 - 164, http://dx.doi.org/10.1007/s11227-007-0124-6

Yang X; Zhang Y; Li G; Wang G; Xue J; Rogers I, 2008, 'Exploiting loop-dependent stream reuse for stream processors', Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT, pp. 22 - 31, http://dx.doi.org/10.1145/1454115.1454121

Lenders P; Xue J, 2008, ' Factorization of singular integer matrices', Linear Algebra and Its Applications, vol. 428, no. 4, pp. 1046 - 1055, http://dx.doi.org/10.1016/j.laa.2007.09.012

Ku AK-A; Kuo JY-C; Xue J, 2008, 'A gather/scatter hardware support for efficient fast fourier transform', 13th IEEE Asia-Pacific Computer Systems Architecture Conference, ACSAC 2008, http://dx.doi.org/10.1109/APCSAC.2008.4625444

Wang L; Yang X; Deng Y; Yan X; Tang T; Xue J; Nguyen QH, 2008, 'Optimizing scientific application loops on stream processors', ACM SIGPLAN Notices, vol. 43, no. 7, pp. 161 - 170

Xue J; Nguyen PH; Potter J, 2007, ' Interprocedural side-effect analysis for incomplete object-oriented software modules', Journal of Systems and Software, vol. 80, no. 1, pp. 92 - 105, http://dx.doi.org/10.1016/j.jss.2006.06.015

Vera X; Lisper B; Xue J, 2007, ' Data cache locking for tight timing calculations', ACM Transactions on Embedded Computing Systems, vol. 7, no. 1, pp. 1 - 38, http://dx.doi.org/10.1145/1324969.1324973

Li L; Xue J, 2007, ' Trace-based leakage energy optimisations at link time', Journal of Systems Architecture, vol. 53, no. 1, pp. 1 - 20, http://dx.doi.org/10.1016/j.sysarc.2006.05.002

Zhu M; Yang LT; Touriño J; Doallo R; Martin MJ; Pan L; Brent RP; Dongarra J; Gustafson J; Joubert G; Pan Y; Bourgeois A; Zhang X; Abawajy JH; Aubanel E; Sarker BK; Bahi J; Banicescu I; Bhalla S; Sedukhin SG; Bic LF; Dillencourt MB; Biswas R; Buecker M; Cabaleiro JC; Cai X; Carretero J; Chen J; Dai Y; De Mello R; Di Martino B; Doncescu A; Gravvanis GA; Huang C-H; Tomko K; Ierotheou C; Jie W; Karatza H; Koziris N; Lei Z; Leng T; Li Y; Michielse PH; Narravula H; Tian X; Ng MK; Ni J; O'Donnell J; Quintana-Orti E; Rauber T; Runger G; Salem FA; Shi H; Skjellum T; Strazdins P; Thulasiram RK; Van Engelen R; Verdoscia L; Wu J; Xiao B; Xu C; Xue J; Yang X; Zheng Y; Zhou B; Zhou X; Zlatev Z; Cariño R; Couturier R; Guo Z; Wang Y; Ding M; Zekri A, 2006, 'Message from HPSEC workshop co-chairs', Proceedings of the International Conference on Parallel Processing Workshops, http://dx.doi.org/10.1109/ICPPW.2006.46

Gentile A; Vitabile S; Sorbello F; Verdoscia L; Abderazek BA; Yang LT; Lin M; Audsley N; Cai X; Cao J; Shao Z; Chai SM; Chang N; Cheng A; Fanucci L; Givargis T; Gomes L; Gupta R; Hassan H; Hsiao MS; Hsiung P-A; Joe K; John E; Zhu D; Kastner R; Kwok Y-K; Lee Y-H; Leporati F; Lopez-Lagunas A; Li T; Liao S-W; Macii A; Nakano K; Navet N; O'Donnell J; Robinson WH; Taha T; Wang F; Scott Wills D; Wills LM; Xue J; Zhang F; Zhang Y; Zhou H; Zhu Y; Marinoni M; Foglia P, 2006, 'Message from IWEC workshop co-chairs', Proceedings of the International Conference on Parallel Processing Workshops, http://dx.doi.org/10.1109/ICPPW.2006.47

Xue J; Cai Q; Gao L, 2006, ' Partial dead code elimination on predicated code regions', Software: Practice and Experience, vol. 36, no. 15, pp. 1655 - 1685, http://dx.doi.org/10.1002/spe.739

Xue J; Cai Q, 2006, ' A lifetime optimal algorithm for speculative PRE', ACM Transactions on Architecture and Code Optimization, vol. 3, no. 2, pp. 115 - 155, http://dx.doi.org/10.1145/1138035.1138036

Xue J, 2005, 'Compiler-directed scratchpad memory management', Lecture Notes in Computer Science, vol. 3820 LNCS, pp. 2 - 2, http://dx.doi.org/10.1007/11599555_2

Jingling X; Vera X, 2004, ' Efficient and accurate analytical modeling of whole-program data cache behavior', IEEE Transactions on Computers, vol. 53, no. 5, pp. 547 - 566_3, http://dx.doi.org/10.1109/TC.2004.1275296

Xue J, 2002, 'Space-Time Equations for Non-Unimodular Mappings', International Journal of Computer Mathematics, pp. 552 - 572

Xue J; Cai W, 2002, ' Time-minimal tiling when rise is larger than zero', Parallel Computing, vol. 28, no. 6, pp. 915 - 939, http://dx.doi.org/10.1016/S0167-8191(02)00098-4

Xue J, 2002, 'Eigenvectors-Based Parallelisation of Nested Loops with Affine Dependences', International Journal of Parallel, Emergent and Distributed Systems, pp. 237 - 248

Xue J; Lenders P, 2002, ' Space-Time Equations for Non-Unimodular Mappings', International Journal of Computer Mathematics, vol. 79, no. 5, pp. 555 - 572, http://dx.doi.org/10.1080/00207160210953

Greenhalgh EP; Tang P; Xue J, 2000, 'Researching the Modern Army: The Royal Australian Corps of Transport', Army Journal, pp. 95 - 100

Tang P; Xue J, 2000, ' Generating efficient tiled code for distributed memory machines', Parallel Computing, vol. 26, no. 11, pp. 1369 - 1410, http://dx.doi.org/10.1016/S0167-8191(00)00040-5

Chen S; Xue J, 1999, ' Partitioning and scheduling loops on NOWs', Computer Communications, vol. 22, no. 11, pp. 1017 - 1033, http://dx.doi.org/10.1016/S0140-3664(99)00073-0

Conference Papers

Zhao J; Feng X; Cui H; Yan Y; Yang W; Xue J, 2013, 'An empirical model for predicting cross-core performance interference on multicore processors', in Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT, pp. 201 - 212, presented at , http://dx.doi.org/10.1109/PACT.2013.6618817

Su Y; Ye D; Xue J, 2013, 'Accelerating Inclusion-based Pointer Analysis on Heterogeneous CPU-GPU Systems', in , presented at , 18 - 21 December 2013

Sui Y; Li Y; Xue J, 2013, 'Query-Directed Adaptive Heap Cloning for Optimizing Compilers', in PROCEEDINGS OF THE 2013 IEEE/ACM INTERNATIONAL SYMPOSIUM ON CODE GENERATION AND OPTIMIZATION (CGO), IEEE, pp. 1 - 11, presented at 11th IEEE/ACM International Symposium on Code Generation and Optimization (CGO), Shenzhen, PEOPLES R CHINA, 23 - 27 February 2013

Wan Q; Wu H; Xue J, 2012, 'WCET-Aware Data Selection and Allocation for Scratchpad Memory', in ACM SIGPLAN NOTICES, ASSOC COMPUTING MACHINERY, pp. 41 - 50, presented at , http://dx.doi.org/10.1145/2345141.2248425

Sui Y; Ye D; Xue J, 2012, 'Static memory leak detection using full-sparse value-flow analysis', in , pp. 254 - 264, presented at 21st International Symposium on Software Testing and Analysis, ISSTA 2012, Minneapolis, MN, 15 - 20 July 2012, http://dx.doi.org/10.1145/04000800.2336784

Shang L; Xie X; Xue J, 2012, 'On-demand dynamic summary-based points-to analysis', in Proceedings - International Symposium on Code Generation and Optimization, CGO 2012, ACM, New York, NY, USA, pp. 264 - 274, presented at 10th International Symposium on Code Generation and Optimization, CGO, San Jose, CA, 31 March - 4 April 2012, http://dx.doi.org/10.1145/2259016.2259050

Lu Y; Potter JM; Xue J, 2012, 'Ownership Types for Object Synchronisation', in Lecture Notes in Computer Science, Springer-Verlag, Heidelberg, Germany, pp. 18 - 33, presented at APLAS, Kyoto Japan, 11 December 2012, http://dx.doi.org/10.1007/978-3-642-35182-2

Mahmud S; Wu H; Xue J, 2011, 'Efficient energy balancing aware multiple base station deployment for WSNs', in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), pp. 179 - 194, presented at , http://dx.doi.org/10.1007/978-3-642-19186-2_12

Cui H; Xue J; Wang L; Yang Y; Feng X-B; Fan D, 2011, 'Extendable pattern-oriented optimization directives', in Proceedings - International Symposium on Code Generation and Optimization, CGO 2011, IEEE Computer Society, Piscataway, NJ, United States, pp. 107 - 118, presented at 9th International Symposium on Code Generation and Optimization, CGO 2011, Chamonix, France, 2 - 6 April 2011, http://dx.doi.org/10.1109/CGO.2011.5764679

Lu Y; Potter JM; Xue J, 2009, 'Ownership Downgrading for Ownership Types', in Lecture Notes In Computer Science; Vol. 5904: Proceedings of the 7th Asian Symposium on Programming Languages and Systems, Springer-Verlag, Berlin, Heidelberg, presented at 7th Asian Symposium on Programming Languages and Systems, Seoul, Korea, 14 - 16 December 2009, http://dx.doi.org/10.1007/978-3-642-10672-9_12

Liu D; Shao Z; Wang M; Guo M; Xue J, 2009, 'Optimal Loop Parallelization for Maximizing Iteration-Level Parallelism', in International Conference on Compilers, Architecture and Synthesis for Embedded Systems archive Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded s, ACM, 2009, presented at 6th International Conference on Hardware/Software CoDesign and System Synthesis (CODES+ISSS 2010), Scottsdale, AZ, 24 - 29 October 2010, http://dx.doi.org/10.1145/1629395.1629407

Yang X; Wang L; Xue J; zhang Y; Deng Y, 2009, 'Compatibility Graph Coloring for Optimizing Utilization Of Stream Register files in Stream processors', in Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP, ACM, USA, presented at 14th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, Raleigh, NC, 14 - 18 February 2009, http://dx.doi.org/10.1145/1504176.1504195


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