By Professor Sri Parameswaran

Conference Papers

Cheung N; Henkel J; Parameswaran S, 2003, 'Rapid Configuration & Instruction Selection for an ASIP: A Case Study', Institute of Electrical and Electronics Engineers (IEEE), pp. 1 - 6, presented at 2003 Design, Automation and Test in Europe Conference and Exhibition, http://dx.doi.org/10.1109/date.2003.1253705

Parameswaran S, 2002, 'SWASAD: an ASIC design for high speed DNA sequence matching', in ASP-DAC/VLSI-Design-2002.-7th-Asia-and-South-Pacific-Design-Automation-Conference-and-15h-International-Conference-on-VLSI-Design. 2002, Bangalore, India, presented at ASP-DAC/VLSI-Design-2002.-7th-Asia-and-South-Pacific-Design-Automation-Conference-and-15h-International-Conference-on-VLSI-Design. 2002, Bangalore, India, 07 January 2002 - 11 January 2002

Parameswaran S, 2001, 'Code placement in hardware software Co synthesis to improve performance and reduce cost', in Proceedings -Design, Automation and Test in Europe, DATE, pp. 626 - 632, http://dx.doi.org/10.1109/DATE.2001.915089

Rae A; Parameswaran S, 2000, 'Voltage reduction of application-specific heterogeneous multiprocessor systems for power minimisation', in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 147 - 152, http://dx.doi.org/10.1145/368434.368594

Boros VE; Rakic AD; Parameswaran S, 2000, 'High-level model of a WDMA passive optical bus for a reconfigurable multiprocessor system', in Proceedings - Design Automation Conference, pp. 221 - 226, http://dx.doi.org/10.1145/337292.337395

Rae A; Parameswaran S, 1998, 'Application-specific heterogeneous multiprocessor synthesis using differential-evolution', in Proceedings of the International Symposium on System Synthesis, pp. 83 - 88, http://dx.doi.org/10.1109/isss.1998.730602

Parameswaran S; Guo H, 1997, 'Partitioning of system level pipelines', in Proceedings of the Australian Microelectronics Conference, pp. 233 - 238

Parameswaran S; Guo H, 1997, 'Power reduction in pipelines', in Proceedings of the Australian Microelectronics Conference, pp. 239 - 244

Guo H; Parameswaran S, 1997, 'Unfolding loops with interdetermine count in system level pipelines', in Proceedings of the Australian Microelectronics Conference, pp. 82 - 87

Parameswaran S; Guo H, 1997, 'Power consumption in CMOS combinational logic blocks at high frequencies', in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 195 - 200

Jha P; Parameswaran S; Dutt N, 1995, 'Reclocking for high level synthesis', in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 49 - 54

Parkinson MF; Parameswaran S, 1995, 'Profiling in the ASP codesign environment', in Proceedings of the International Symposium on System Synthesis, pp. 128 - 133, http://dx.doi.org/10.1145/224486.224531

Kia SM; Parameswaran S, 1994, 'Design automation of self checking circuits', in European Design Automation Conference - Proceedings, pp. 252 - 257

Kia SM; Parameswaran S, 1994, 'Novel architectures for TSC/CD and SFS/SCD synchronous controllers', in Proceedings of the IEEE VLSI Test Symposium, pp. 138 - 143

Parkinson MF; Taylor PM; Parameswaran S, 1994, 'C to VHDL converter in a codesign environment', in Spring 1994 Conference - Proceedings VHDL International Users Forum, VIUF 1994, pp. 100 - 109, http://dx.doi.org/10.1109/VIUF.1994.323960

Cheung N; Parameswarant S; Henkel J, 'Battery aware instruction generation for embedded processors', in Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005., IEEE, presented at ASP-DAC 2005. Asia and South Pacific Design Automation Conference 2005, http://dx.doi.org/10.1109/aspdac.2005.1466225

Parkinson MF; Parameswaran S, 'Profiling in the ASP codesign environment', in Proceedings of the Eighth International Symposium on System Synthesis, IEEE Comput. Soc. Press, presented at Eighth International Symposium on System Synthesis, http://dx.doi.org/10.1109/isss.1995.520624

Chandra R; Henkel J; Panda PR; Parameswaran S; Ramachandran L, 'Specification and design of multi-million gate SOCs', in 16th International Conference on VLSI Design, 2003. Proceedings., IEEE Comput. Soc, presented at 16th International Conference on VLSI Design. Concurrently with the 2nd International Conference on Embedded Systems Design, http://dx.doi.org/10.1109/icvd.2003.1183107

Rae A; Parameswaran S, 'Voltage reduction of application-specific heterogeneous multiprocessor systems for power minimisation', in Proceedings 2000. Design Automation Conference. (IEEE Cat. No.00CH37106), IEEE, presented at ASP-DAC2000: Asia and South Pacific Design Automation Conference 2000, http://dx.doi.org/10.1109/aspdac.2000.835086

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