Select Publications

by Dr Hui Guo

Books

Guo HA; Parameswaran S; Radhakrishnan S, 2008, Heterogeneous multi-pipeline ASIP, VDM Verlag, Germany

Journal articles

Chen H; Zhu X; Guo H; Zhu J; Qin X; Wu J, 2015, 'Towards energy-efficient scheduling for real-time tasks under uncertain cloud computing environment', Journal of Systems and Software, vol. 99, pp. 20 - 35, http://dx.doi.org/10.1016/j.jss.2014.08.065

Chen H; Zhu X; Guo H; Zhu J; Qin X; Wu J, 2014, 'Towards energy-efficient scheduling for real-time tasks under uncertain cloud computing environment', Journal of Systems and Software, http://dx.doi.org/10.1016/j.jss.2014.08.065

Guo H; Zhang R; Garg S, 2013, 'Register File Customization for Embedded Multi-Threaded Pipelined Processors', International Journal of Computer Theory and Engineering, vol. 5, no. 3, pp. 551 - 556, http://dx.doi.org/10.7763/IJCTE.2013.V5.748

He C; Zhu X; Guo H; Qiu D; Jiang J, 2012, 'Rolling-horizon scheduling for energy constrained distributed real-time embedded systems', Journal of Systems and Software, vol. 85, no. 4, pp. 780 - 794, http://dx.doi.org/10.1016/j.jss.2011.10.008

Gu J; Guo H; Li P, 2011, 'An on-chip instruction cache design with one-bit tag for low-power embedded systems', Microprocessors and Microsystems, vol. 35, no. 4, pp. 382 - 391, http://dx.doi.org/10.1016/j.micpro.2011.02.003

Radhakrishnan S; Guo H; Parameswaran S; Ignjatovic A, 2009, 'HMP-ASIPs: Heterogeneous multi-pipeline application-specific instruction-set processors', IET Computers and Digital Techniques, vol. 3, no. 1, pp. 94 - 108, http://dx.doi.org/10.1049/iet-cdt:20080005

Hong M; Guo H, 2009, 'Design of multi-service smart card systems for high security and performance', International Journal of Security and its Applications, vol. 3, no. 1, pp. 87 - 100

Gu J; Guo H, 2009, 'An efficient segmental bus-invert coding method for instruction memory data bus switching reduction', Eurasip Journal on Embedded Systems, vol. 2009, http://dx.doi.org/10.1155/2009/973976

Zhang D-M; Fu M-S; Guo H; Luo B, 2009, 'Automatic estimation algorithm of component number of mixture model based on penalized distance', Huanan Ligong Daxue Xuebao/Journal of South China University of Technology (Natural Science), vol. 37, no. 10, pp. 101 - 107

Conference Papers

Liu T; Guo H, 2015, 'Dynamic encryption key design and its security evaluation for memory data protection in embedded systems', in 2014 International Conference on IT Convergence and Security, ICITCS 2014, Institute of Electrical and Electronics Engineers Inc., http://dx.doi.org/10.1109/ICITCS.2014.7021759

Wickramasinghe M; Guo H, 2014, 'Energy-aware thread scheduling for embedded multi-threaded processors: Architectural level design and implementation', in Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, IEEE Computer Society, pp. 178 - 183, http://dx.doi.org/10.1109/ISVLSI.2014.55

Guo H; Zhang R, 2013, 'Evaluation of Multi-Threaded Processor Designs for Energy Efficient Embedded Systems', in 2013 IEEE 16th International Conference on Computational Science and Engineering (CSE 2013), IEEE Computer Society, pp. 619 - 626, presented at 2013 IEEE 16th International Conference on Computational Science and Engineering, Sydney, Australia, 3 - 5 December 2013, http://dx.doi.org/10.1109/CSE.2013.97

Hong M; Guo H; Hu XS, 2012, 'A cost-effective tag design for memory data authentication in embedded systems', in CASES'12 - Proceedings of the 2012 ACM International Conference on Compilers, Architectures and Synthesis for Embedded Systems, Co-located with ESWEEK, pp. 17 - 26, http://dx.doi.org/10.1145/2380403.2380414

Gu J; Guo H, 2010, 'An energy efficient instruction prefetching scheme for embedded processors', in Communications in Computer and Information Science, pp. 73 - 88, http://dx.doi.org/10.1007/978-3-642-13467-8_8

Gu J; Guo H, 2010, 'Enabling large decoded instruction loop caching for energy-aware embedded processors', in Embedded Systems Week 2010 - Proceedings of the 2010 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES'10, pp. 247 - 256, http://dx.doi.org/10.1145/1878921.1878957

Gu J; Guo H, 2009, 'A Segmental Bus-Invert Coding Method for Instruction Memory Data Bus Power Efficiency', in ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5, IEEE, pp. 137 - 140, presented at IEEE International Symposium on Circuits and Systems (ISCAS 2009), Taipei, TAIWAN, 24 - 27 May 2009

Zhou Y; Guo H; Gu J, 2009, 'Register file customization for low power embedded processors', in Proceedings - 2009 2nd IEEE International Conference on Computer Science and Information Technology, ICCSIT 2009, pp. 92 - 96, http://dx.doi.org/10.1109/ICCSIT.2009.5234988

Gu J; Guo H; Li P, 2009, 'ROBTIC: An on-chip instruction Cache design for low power embedded systems', in Proceedings - 15th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2009, pp. 419 - 424, http://dx.doi.org/10.1109/RTCSA.2009.51

Ignjatovic A; Lee CT; Kutay CM; Guo HA; Compton PJ, 2009, 'Computing marks for multiple assessors using adaptive averaging', in Proceedings of ICEE & ICEER 2009 Korea, Publishing Committee. ICEE & ICEER 2009, Korea, presented at International Conference on Engineering Education & Research, Seoul, Korea, 23 - 28 August 2009

Zhou Y; Guo H, 2008, 'Application specific low power ALU design', in Proceedings of The 5th International Conference on Embedded and Ubiquitous Computing, EUC 2008, pp. 214 - 220, http://dx.doi.org/10.1109/EUC.2008.81

Hong M; Guo H; Luo B, 2008, 'Security design for multi-service smart card systems', in Proceedings of the 2008 2nd International Conference on Future Generation Communication and Networking, FGCN 2008, pp. 299 - 304, http://dx.doi.org/10.1109/FGCN.2008.25

Zhang D; Guo H; Luo B, 2008, 'An algorithm for estimating number of components of gaussian mixture model based on penalized distance', in 2008 IEEE International Conference Neural Networks and Signal Processing, ICNNSP, pp. 482 - 487, http://dx.doi.org/10.1109/ICNNSP.2008.4590397

Hong M; Guo HA; Luo B, 2008, 'Security Design for Multi-Service Smart Card Systems', in FGCN: PROCEEDINGS OF THE 2008 SECOND INTERNATIONAL CONFERENCE ON FUTUREGENERATION COMMUNICATION AND NETWORKING, VOLS 1 AND 2, Ieee Computer Soc, Los Alamitos, 1 January 2008

Radhakrishnan S; Quo H; Parameswaran S, 2006, 'Customization of application specific heterogeneous multi-pipeline processors', in Proceedings -Design, Automation and Test in Europe, DATE

Radhakrishnan S; Guo H; Parameswaran S; Ignjatovic A, 2006, 'Application specific forwarding network and instruction encoding for multi-pipe ASIPs', in CODES+ISSS 2006: Proceedings of the 4th International Conference on Hardware Software Codesign and System Synthesis, pp. 241 - 246, http://dx.doi.org/10.1145/1176254.1176313

Guo H; Parameswaran S, 2005, 'Balancing system level pipelines with stage voltage scaling', in Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI, pp. 287 - 289

Radhakrishnan S; Guo H; Parameswaran S, 2004, 'Dual-pipeline heterogeneous ASIP design', in Second IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and Systems Synthesis, CODES+ISSS 2004, pp. 12 - 17


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