Select Publications

by Dr Hui Guo

Books

Guo HA; Parameswaran S; Radhakrishnan S, 2008, Heterogeneous multi-pipeline ASIP, VDM Verlag, Germany

Journal articles

Zhang R; Guo H; Garg S, 2013, ' Register File Customization for Embedded Multi-Threaded Pipelined Processors', International Journal of Computer Theory and Engineering, pp. 551 - 556, http://dx.doi.org/10.7763/IJCTE.2013.V5.748

He C; Zhu X; Guo H; Qiu D; Jiang J, 2012, ' Rolling-horizon scheduling for energy constrained distributed real-time embedded systems', Journal of Systems and Software, vol. 85, no. 4, pp. 780 - 794, http://dx.doi.org/10.1016/j.jss.2011.10.008

Gu J; Guo H; Li P, 2011, ' An on-chip instruction cache design with one-bit tag for low-power embedded systems', Microprocessors and Microsystems, vol. 35, no. 4, pp. 382 - 391, http://dx.doi.org/10.1016/j.micpro.2011.02.003

Gu J; Guo H, 2009, ' An Efficient Segmental Bus-Invert Coding Method for Instruction Memory Data Bus Switching Reduction', Eurasip Journal of Embedded Systems, vol. 2009, no. 1, pp. 973976 - 973976, http://dx.doi.org/10.1155/2009/973976

Hong M; Guo HA, 2009, 'Design of Multi-Service Smart Card Systems for High Security and Performance', International Journal of Security and its Applications, vol. 3, no. 1, pp. 87 - 100

Zhang D-M; Fu M-S; Luo B; Guo H, 2009, 'Automatic estimation algorithm of component number of mixture model based on penalized distance', Huanan Ligong Daxue Xuebao/Journal of South China University of Technology (Natural Science), vol. 37, no. 10, pp. 101 - 107

Radhakrishnan S; Guo H; Parameswaran S; Ignjatovic A, 2009, ' HMP-ASIPs: heterogeneous multi-pipeline application-specific instruction-set processors', IET Computers and Digital Techniques, vol. 3, no. 1, pp. 94 - 94, http://dx.doi.org/10.1049/iet-cdt:20080005

Radhakrishnan S; Guo H; Parameswaran S; Ignjatovic A, 2006, 'Application specific forwarding network and instruction encoding for multi-pipe ASIPs', CODES+ISSS 2006: Proceedings of the 4th International Conference on Hardware Software Codesign and System Synthesis, pp. 241 - 246, http://dx.doi.org/10.1145/1176254.1176313

Conference Papers

Guo H; Zhang R, 2013, 'Evaluation of Multi-Threaded Processor Designs for Energy Efficient Embedded Systems', in 2013 IEEE 16th International Conference on Computational Science and Engineering (CSE 2013), IEEE Computer Society, pp. 619 - 626, presented at 2013 IEEE 16th International Conference on Computational Science and Engineering, Sydney, Australia, 3 - 5 December 2013, http://dx.doi.org/10.1109/CSE.2013.97

Hong M; Guo HA; Hu XS, 2012, 'A Cost-Effective Tag Design for Memory Data Authentication in Embedded Systems', in Proceedings of the 2012 international conference on Compilers, architectures and synthesis for embedded systems, ACM, New York, NY, USA ©2012, pp. 17 - 26, presented at International Conference on Compilers Architecture and Synthesis for Embedded Systems, Tampere, Finland, 7 - 12 October 2012, http://dx.doi.org/10.1145/2380403.2380414

Gu J; Guo HA, 2010, 'An Energy Efficient Instruction Prefetching Scheme for Embedded Processors', in Proceedings of International Conference Ubiquitous Computing and Multimedia Applications, Springer, Germany, pp. 73 - 88, presented at The 2010 International Conference Ubiquitous Computing and Multimedia Applications, Miyazaki, Japan, 23 June 2010

Gu J; Guo HA, 2010, 'Enabling large decoded instruction loop caching for energy-aware embedded processors', in Proceedings of International Conference on Compilers Architectures and Synthesis for Embedded Systems (CASES), ACM, New York, USA, pp. 247 - 256, presented at International Conference on Compilers Architectures and Synthesis for Embedded Systems (CASES), Taipei, Taiwan, 9 - 14 October 2010, http://dx.doi.org/10.1145/1878921.1878957

Gu J; Guo H, 2009, 'A Segmental Bus-Invert Coding Method for Instruction Memory Data Bus Power Efficiency', in Proceeding of the 2009 IEEE International Symposium on Circuits and Systems (ISCAS 2009), IEEE CAS Society, Taipei, Taiwan, presented at IEEE International Symposium on Circuits and Systems 2009, 24 - 27 May 2009, http://dx.doi.org/10.1109/ISCAS.2009.5117704

Gu J; Guo HA; Li P, 2009, 'ROBTIC: An On-Chip Instruction Cache Design for Low Power Embedded Systems', in Proceedings of the 15th IEEE International Conference on embedded and Real-time Computing Systems and Application, IEEE Computer Society, Beijing, China, presented at 15th IEEE International Conference on Embedded and Real-time Computing Systems and Application, Beijing, China, 24 - 26 August 2009, http://dx.doi.org/10.1109/RTCSA.2009.51

Zhou Y; Guo HA, 2009, 'Register File Customization for Low Power Embedded Processors', in Proceeding of the 2nd IEEE International Conference on Computer Science and Information Technology (IEEE ICCSIT 2009), IEEE Computer Society, Beijing , China, presented at 2nd IEEE International Conference on Computer Science and Information Technology (IEEE ICCSIT 2009), Beijing , China, 8 - 11 August 2009

Ignjatovic A; Lee CT; Kutay CM; Guo HA; Compton PJ, 2009, 'Computing marks for multiple assessors using adaptive averaging', in Proceedings of ICEE & ICEER 2009 Korea, Publishing Committee. ICEE & ICEER 2009, Korea, presented at International Conference on Engineering Education & Research, Seoul, Korea, 23 - 28 August 2009

Guo HA; Hong M, 2008, 'Security Design for Networked Multi-Service Smart Card Systems', in Proc. of the 2nd Intl. Conf. on Future Generation Communication and Networking (FGCN 2008), presented at 2nd International Conference on Future Generation Communication and Networking (FGCN 2008), Sanya, China, 13 December 2008

Zhang D; Guo HA; Luo B, 2008, 'An algorithm for estimating number of components of Gaussian mixture model based on penalized distance', in 2008 International conference on neural networks and signal processing, presented at International conference on neural networks and signal processing 2008, Zhenjiang, China, 7 - 11 June 2008

Hong M; Guo HA; Luo B, 2008, 'Security Design for Multi-Service Smart Card Systems', in FGCN: PROCEEDINGS OF THE 2008 SECOND INTERNATIONAL CONFERENCE ON FUTUREGENERATION COMMUNICATION AND NETWORKING, VOLS 1 AND 2, Ieee Computer Soc, Los Alamitos, 1 January 2008

Guo HA; Zhou Y, 2008, 'Application Specific Low Power ALU Design', in 2008 IEEE/IFIP international conference on embedded and ubiquitous computing, Proceedings, presented at 2008 IEEE/IFIP international conference on embedded and ubiquitous computing, Shanghai, China, 17 - 20 December 2008

Radhakrishnan S; Guo HA; Parameswaran S, 2006, 'Customization of application specific heterogeneous multi-pipeline processors', in 43rd Design automation conference, presented at 43rd Design automation conference, Munich, Germany, 6 - 10 March 2006

Guo HA; Parameswaran S, 2005, 'Balancing system level pipelines with stage voltage scaling', in IEEE annual symposium on VLSI, presented at IEEE annual symposium on VLSI, Tampa, Florida, USA, 11 - 12 May 2005

Parameswaran S; Guo HA; Radhakrishnan S, 2004, 'Dual-Pipeline Heterogeneous ASIP Design', in CODES + ISSS 2004, presented at CODES + ISSS 2004, Stockholm, Sweden, 8 - 10 September 2004


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