By Associate Professor Oliver Diessel

Journal articles

Kroh A; Diessel O, 2019, 'Efficient fine-grained processor-logic interactions on the cache-coherent zynq platform', ACM Transactions on Reconfigurable Technology and Systems, 11, http://dx.doi.org/10.1145/3277506

Agiakatsikas D; Cetin E; Diessel O, 2018, 'FMER: An Energy-Efficient Error Recovery Methodology for SRAM-Based FPGA Designs', IEEE Transactions on Aerospace and Electronic Systems, 54, pp. 2695 - 2712, http://dx.doi.org/10.1109/TAES.2018.2828201

Nguyen NTH; Agiakatsikas D; Zhao Z; Wu T; Cetin E; Diessel O; Gong L, 2018, 'Reconfiguration Control Networks for FPGA-based TMR systems with modular error recovery', Microprocessors and Microsystems, 60, pp. 86 - 95, http://dx.doi.org/10.1016/j.micpro.2018.04.006

Zhao Z; Nguyen NTH; Agiakatsikas D; Lee G; Cetin E; Diessel O, 2018, 'Fine-grained module-based error recovery in FPGA-based TMR systems', ACM Transactions on Reconfigurable Technology and Systems, 11, pp. 1 - 23, http://dx.doi.org/10.1145/3173549

Lee G; Cetin E; Diessel O, 2017, 'Fault recovery time analysis for coarse-grained reconfigurable architectures', ACM Transactions on Embedded Computing Systems, 17, pp. 1 - 21, http://dx.doi.org/10.1145/3140944

Wang C; Li X; Chen Y; Zhang Y; Diessel O; Zhou X, 2017, 'Service-Oriented Architecture on FPGA-Based MPSoC', IEEE Transactions on Parallel and Distributed Systems, 28, pp. 2993 - 3006, http://dx.doi.org/10.1109/TPDS.2017.2701828

Leong PHW; Amano H; Anderson J; Bertels K; Cardoso JMP; Diessel O; Gogniat G; Hutton M; Lee J; Luk W; Lysaght P; Platzner M; Prasanna VK; Rissa T; Silvano C; So HKH; Wang Y, 2017, 'The first 25 years of the FPL conference: Significant papers', ACM Transactions on Reconfigurable Technology and Systems, 10, http://dx.doi.org/10.1145/2996468

Gong L; Diessel O, 2014, 'Simulation-based functional verification of dynamically reconfigurable systems', ACM Transactions on Embedded Computing Systems (TECS), 13, pp. 97 - 97

Shannon L; Diessel O; Bergmann NW, 2012, 'Guest editorial: Field-programmable technology', Journal of Signal Processing Systems, 67, pp. 1 - 2, http://dx.doi.org/10.1007/s11265-011-0653-3

Koh S; Diessel OF, 2010, 'Configuration Merging in Point-to-Point Networks for Module-Based FPGA Reconfiguration', ACM Transactions on Reconfigurable Technology and Systems, 3, pp. 1 - 36, http://dx.doi.org/10.1145/1661438.1661442

Scheuermann B; So KK; Guntsch M; Middendorf M; Diessel OF; Elgindy H; Schmeck H, 2004, 'FPGA Implementation of Population-based Ant Colony Optimization', Applied soft computing : the official journal of the World Federation on Soft Computing (WFSC), 4, pp. 303 - 322

Diessel O; Malik U; So K, 2002, 'Towards high-level specification, synthesis, and virtualization of programmable logic designs', European Conference on Parallel Processing, pp. 314 - 317

Diessel OF; Milne G, 2001, 'A hardware compiler realizing concurrent processes in reconfigurable logic', IEE Proceedings-Computers and Digital Techniques, 148, pp. 152 - 162

Diessel OF; Elgindy H, 2001, 'On dynamic task scheduling for FPGA-based systems', International Journal of Foundations of Computer Science, 12, pp. 645 - 669, http://dx.doi.org/10.1142/S0129054101000709

Diessel OF; Elgindy H; Middendorf M; Schmeck H; Schmidt B, 2000, 'Dynamic scheduling of tasks on partially reconfigurable FPGAs', IEE Proceedings-Computers and Digital Techniques, 147, pp. 181 - 188

Beresford-Smith B; Diessel O; ElGindy H, 1996, 'Optimal algorithms for constrained reconfigurable meshes', Journal of Parallel and Distributed Computing, 39, pp. 74 - 78, http://dx.doi.org/10.1006/jpdc.1996.0155

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