By Scientia Professor Jingling Xue

Journal articles

Chen S; Xue J, 1999, 'Partitioning and scheduling loops on NOWs', Computer Communications, 22, pp. 1017 - 1033, http://dx.doi.org/10.1016/s0140-3664(99)00073-0

Xue J; Huang C-H, 1998, 'Reuse-Driven Tiling for Improving Data Locality', International Journal of Parallel Programming, 26, http://dx.doi.org/10.1023/A:1018734612524

Xue J, 1997, 'On tiling as a loop transformation', Parallel Processing Letters, 7, pp. 409 - 424, http://dx.doi.org/10.1142/S0129626497000401

Xue J, 1997, 'Communication-Minimal Tiling of Uniform Dependence Loops', Journal of Parallel and Distributed Computin, 42, pp. 42 - 59, http://dx.doi.org/10.1006/jpdc.1997.1310

Xue J, 1997, 'On Tiling as a Loop Transformation', Parallel Processing Letters, 07, pp. 409 - 424, http://dx.doi.org/10.1142/S0129626497000401

Xue J, 1997, 'Unimodular transformations of non-perfectly nested loops', Parallel Computing, 22, pp. 1621 - 1645, http://dx.doi.org/10.1016/S0167-8191(96)00063-4

Xue J, 1996, 'Generalising the unimodular approach to restructure imperfectly nested loops', Parallel Processing Letters, 6, pp. 401 - 414, http://dx.doi.org/10.1142/S0129626496000388

Xue J, 1996, 'GENERALISING THE UNIMODULAR APPROACH TO RESTRUCTURE IMPERFECTLY NESTED LOOPS', Parallel Processing Letters, 06, pp. 401 - 414, http://dx.doi.org/10.1142/S0129626496000388

Xue J, 1996, 'Transformations of nested loops with non-convex iteration spaces', Parallel Computing, 22, pp. 339 - 368, http://dx.doi.org/10.1016/0167-8191(95)00069-0

Xue J, 1995, 'Closed-form mapping conditions for the synthesis of linear processor arrays', Journal of VLSI signal processing systems for signal, image and video technology, 10, pp. 181 - 199, http://dx.doi.org/10.1007/BF02407035

Xue J, 1994, 'Automating non-unimodular loop transformations for massive parallelism', Parallel Computing, 20, pp. 711 - 728, http://dx.doi.org/10.1016/0167-8191(94)90002-7

Lengauer C; Xue J, 1992, 'A systolic array for pyramidal algorithms', Journal of VLSI Signal Processing, 4, pp. 89, http://dx.doi.org/10.1007/BF00930620

XUE JL, 1992, 'ON THE LOADING, RECOVERY AND ACCESS OF STATIONARY DATA IN SYSTOLIC ARRAYS', LECTURE NOTES IN COMPUTER SCIENCE, 634, pp. 259 - 264, https://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&KeyUT=WOS:A1992KQ20400031&DestLinkType=FullRecord&DestApp=ALL_WOS&UsrCustomerID=891bb5ab6ba270e68a29b250adbe88d1

Xue J; Lengauer C, 1992, 'The synthesis of control signals for one-dimensional systolic arrays', Integration, the VLSI Journal, 14, pp. 1 - 32, http://dx.doi.org/10.1016/0167-9260(92)90008-M

Lengauer C; Xue J, 1991, 'A systolic array for pyramidal algorithms', Journal of VLSI signal processing systems for signal, image and video technology, 3, pp. 237 - 257, http://dx.doi.org/10.1007/BF00925834

XUE JINGLING, 1991, 'SPECIFYING CONTROL SIGNALS FOR SYSTOLIC ARRAYS BY UNIFORM RECURRENCE EQUATIONS', Parallel Processing Letters, 01, pp. 83 - 93, http://dx.doi.org/10.1142/S0129626491000033

Xue J-L; Hong X-L, 1988, 'A new data structure for representing cell hierarchy in layout design', Computers & Graphics, 12, pp. 341 - 348, http://dx.doi.org/10.1016/0097-8493(88)90055-6

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