Select Publications

Books

Xue J, 2000, Loop Tiling for Parallelism, Original, Kluwer Academic Publishers, Boston

Book Chapters

Xue J; Huang Q, 2006, 'Code Tiling: One Size Fits All', in High-Performance Computing: Paradigm and Infrastructure, pp. 219 - 240, http://dx.doi.org/10.1002/0471732710.ch11

Lengauer C; Xue J, 1994, 'Adapting a sequential algorithm for a systolic design', in Transformational Approaches to Systolic Design, Chapman & Hall, pp. 179 - 204, https://www.amazon.com/Transformational-Approaches-Systolic-Distributed-Computing/dp/0412448300?ie=UTF8&*Version*=1&*entries*=0

Xue J; Lengauer C, 1991, 'Specifying control signals for one-dimensional systolic arrays by uniform recurrence equations', in Algorithms and Parallel VLSI Architectures II, Elsevier, pp. 181 - 187, https://books.google.com.au/books/about/Algorithms_and_parallel_VLSI_architectur.html?id=nZJQAAAAMAAJ&redir_esc=y

Journal articles

Wang L; Xue J; Liao X; Wen Y; Chen M, 2019, 'LCCFS: a lightweight distributed file system for cloud computing without journaling and metadata services', Science China Information Sciences, vol. 62, http://dx.doi.org/10.1007/s11432-017-9295-4

Li Y; Tan T; Xue J, 2019, 'Understanding and analyzing Java reflection', ACM Transactions on Software Engineering and Methodology, vol. 28, http://dx.doi.org/10.1145/3295739

Zhang F; Xue J, 2018, 'Poker: Permutation-based SIMD execution of intensive tree search by path encoding', ACM Transactions on Architecture and Code Optimization, vol. 15, http://dx.doi.org/10.1145/3280850

Su X; Liao X; Jiang H; Yang C; Xue J, 2018, 'SCP: Shared cache partitioning for high-performance GEMM', ACM Transactions on Architecture and Code Optimization, vol. 15, http://dx.doi.org/10.1145/3274654

Sui Y; Yan H; Zheng Z; Zhang Y; Xue J, 2018, 'Parallel construction of interprocedural memory SSA form', Journal of Systems and Software, vol. 146, pp. 186 - 195, http://dx.doi.org/10.1016/j.jss.2018.09.038

Sui Y; Xue J, 2018, 'Value-Flow-Based Demand-Driven Pointer Analysis for C and C++', IEEE Transactions on Software Engineering, http://dx.doi.org/10.1109/TSE.2018.2869336

Zhang Y; Li Y; Tan T; Xue J, 2018, 'Ripple: Reflection analysis for Android apps in incomplete information environments', Software - Practice and Experience, vol. 48, pp. 1419 - 1437, http://dx.doi.org/10.1002/spe.2577

Sui Y; Fan X; Zhou H; Xue J, 2018, 'Loop-Oriented pointer analysis for automatic SIMD vectorization', ACM Transactions on Embedded Computing Systems, vol. 17, http://dx.doi.org/10.1145/3168364

Su X; Wu H; Xue J, 2017, 'An Efficient WCET-Aware Instruction Scheduling and Register Allocation Approach for Clustered VLIW Processors', ACM Trans. Embed. Comput. Syst., vol. 16, pp. 120:1 - 120:21, http://dx.doi.org/10.1145/3126524

Wang Y; Wang T; Liu D; Shao Z; Xue J, 2017, 'Fine grained, direct access file system support for storage class memory', Journal of Systems Architecture, vol. 72, pp. 80 - 92, http://dx.doi.org/10.1016/j.sysarc.2016.07.003

Wang Z; Tang Y; Chen J; Xue J; Zhou Y; Dong Y, 2016, 'Energy wall for exascale supercomputing', Computing and Informatics, vol. 35, pp. 941 - 962

Sui Y; Ye D; Su Y; Xue J, 2016, 'Eliminating Redundant Bounds Checks in Dynamic Buffer Overflow Detection Using Weakest Preconditions', IEEE Transactions on Reliability, vol. PP, pp. 1 - 18, http://dx.doi.org/10.1109/TR.2016.2570538

Zhao J; Cui H; Xue J; Feng X, 2016, 'Predicting Cross-Core Performance Interference on Multicore Processors with Regression Analysis', IEEE Transactions on Parallel and Distributed Systems, vol. 27, pp. 1443 - 1456, http://dx.doi.org/10.1109/TPDS.2015.2442983

Chen J; Tang Y; Dong Y; Xue J; Wang Z; Zhou W, 2016, 'Reducing Static Energy in Supercomputer Interconnection Networks Using Topology-Aware Partitioning', IEEE Transactions on Computers, vol. 65, pp. 2588 - 2602, http://dx.doi.org/10.1109/TC.2015.2493523

Liu D; Zhong K; Wang T; Wang Y; Shao Z; Sha E; Xue J, 2016, 'Durable Address Translation in PCM-based Flash Storage Systems', IEEE Transactions on Parallel and Distributed Systems, vol. 28, pp. 1 - 1, http://dx.doi.org/10.1109/TPDS.2016.2586059

Su Y; Ye D; Xue J; Liao XK, 2016, 'An Efficient GPU Implementation of Inclusion-Based Pointer Analysis', IEEE Transactions on Parallel and Distributed Systems, vol. 27, pp. 353 - 366, http://dx.doi.org/10.1109/TPDS.2015.2397933

Zhou H; Xue J, 2016, 'A compiler approach for exploiting partial SIMD parallelism', ACM Transactions on Architecture and Code Optimization, vol. 13, pp. 11:1 - 11:26, http://dx.doi.org/10.1145/2886101

Su Y; Ye D; Xue J; Liao XK, 2016, 'An Efficient GPU Implementation of Inclusion-Based Pointer Analysis', IEEE Transactions on Parallel and Distributed Systems, vol. 27, pp. 353 - 366, http://dx.doi.org/10.1109/TPDS.2015.2397933

Wang L; Liao XK; Xue JL; Weil S; Wen YC; Yang XJ, 2015, 'Enhancement of cooperation between file systems and applications — on VFS extensions for optimized performance', Science China Information Sciences, vol. 58, http://dx.doi.org/10.1007/s11432-014-5181-x

Sui Y; Ye S; Xue J; Zhang J, 2014, 'Making context-sensitive inclusion-based pointer analysis practical for compilers using parameterised summarisation', Software: Practice and Experience, vol. 44, pp. 1485 - 1510, http://dx.doi.org/10.1002/spe.2214

Sui Y; Ye D; Xue J, 2014, 'Detecting memory leaks statically with full-sparse value-flow analysis', IEEE Transactions on Software Engineering, vol. 40, pp. 107 - 122, http://dx.doi.org/10.1109/TSE.2014.2302311

Liao XK; Yung CQ; Tang T; Yi HZ; Wang F; Wu Q; Xue J, 2014, 'OpenMC: Towards simplifying programming for tianhe supercomputers', Journal of Computer Science and Technology, vol. 29, pp. 532 - 546, http://dx.doi.org/10.1007/s11390-014-1447-4

Wang L; Xue JL; Yang XJ, 2014, 'Acyclic orientation graph coloring for software-managed memory allocation', Science China Information Sciences, vol. 57, pp. 1 - 18, http://dx.doi.org/10.1007/s11432-014-5131-7

Sui Y; Ye D; Xue J, 2014, 'Detecting memory leaks statically with full-sparse value-flow analysis', IEEE Transactions on Software Engineering, vol. 40, pp. 107 - 122, http://dx.doi.org/10.1109/TSE.2014.2302311

Sui Y; Ye S; Xue J; Zhang J, 2014, 'Making context-sensitive inclusion-based pointer analysis practical for compilers using parameterised summarisation', Software: Practice and Experience, vol. 44, pp. 1485 - 1510, http://dx.doi.org/10.1002/spe.2214

Zhang X; Wu H; Xue J, 2013, 'Instruction scheduling with k-successor tree for clustered VLIW processors', Design Automation for Embedded Systems, vol. 17, pp. 439 - 458, http://dx.doi.org/10.1007/s10617-012-9103-0

Yang C-Q; Wu Q; Tang T; Wang F; Xue J-L, 2013, 'Programming for scientific computing on peta-scale heterogeneous parallel systems', Journal of Central South University, vol. 20, pp. 1189 - 1203, http://dx.doi.org/10.1007/s11771-013-1602-z

Li J; Xue J; Xie X; Wan Q; Tan Q; Tan L, 2013, 'Epipe: A low-cost fault-tolerance technique considering WCET constraints', Journal of Systems Architecture, vol. 59, pp. 1383 - 1393, http://dx.doi.org/10.1016/j.sysarc.2013.06.003

Li J; Xue J; Xie X; Wan Q; Tan Q; Tan L, 2013, 'Epipe: A low-cost fault-tolerance technique considering WCET constraints', Journal of Systems Architecture, vol. 59, pp. 1383 - 1393, http://dx.doi.org/10.1016/j.sysarc.2013.06.003

Zhang X; Wu H; Xue J, 2013, 'Instruction scheduling with k-successor tree for clustered VLIW processors', Design Automation for Embedded Systems, vol. 17, pp. 439 - 458, http://dx.doi.org/10.1007/s10617-012-9103-0

Wang L; Xue J; Yang X, 2012, 'Optimizing modulo scheduling to achieve reuse and concurrency for stream processors', Journal of Supercomputing, vol. 59, pp. 1229 - 1251, http://dx.doi.org/10.1007/s11227-010-0522-z

Liu D; Wang Y; Shao Z; Guo M; Xue J, 2012, 'Optimally Maximizing Iteration-Level Loop Parallelism', IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, vol. 23, pp. 564 - 572, http://dx.doi.org/10.1109/TPDS.2011.171

Di P; Wu H; Xue J; Wang F; Yang C, 2012, 'Parallelizing SOR for GPGPUs using alternate loop tiling', Parallel Computing, vol. 38, pp. 310 - 328, http://dx.doi.org/10.1016/j.parco.2012.03.004

Di P; Wu H; Xue J; Wang F; Yang C, 2012, 'Parallelizing SOR for GPGPUs Using Alternate Loop Tiling', Parallel Computing, vol. 38, pp. 310 - 328, http://dx.doi.org/10.1016/j.parco.2012.03.004

Gao L; Xue J; Ngai TF, 2010, 'Loop recreation for thread-level speculation on multicore processors', Software - Practice and Experience, vol. 40, pp. 45 - 72, http://dx.doi.org/10.1002/spe.947

Mi W; Feng X-B; Yao C; Chen L; Xue J, 2009, 'PARBLO: Page-Allocation-Based DRAM Row Buffer Locality Optimization', Journal of Computer Science and Technology, vol. 24, pp. 1086 - 1097, http://dx.doi.org/10.1007/s11390-009-9297-1

Li L; Feng H; Xue J, 2009, 'Compiler-directed scratchpad memory management via graph coloring', ACM Transactions on Architecture and Code Optimization, vol. 6, pp. 1 - 17, http://dx.doi.org/10.1145/1582710.1582711

Li L; Feng H; Xue J, 2009, 'Compiler-directed scratchpad memory management via graph coloring', ACM Transactions on Architecture and Code Optimization, vol. 6, http://dx.doi.org/10.1145/1582710.1582711

Xue J; Lenders P, 2008, 'Factorization of singular integer matrices', Linear Algebra and its Applications, vol. 428, pp. 1046 - 1055, http://dx.doi.org/10.1016/j.laa.2007.09.012

Xue J; Guo M; Wei D, 2008, 'Improving the parallelism of iterative methods by aggressive loop fusion', Journal of Supercomputing, vol. 43, pp. 147 - 164, http://dx.doi.org/10.1007/s11227-007-0124-6

Scholz B; Burgstaller B; Xue J, 2008, 'Minimal placement of bank selection instructions for partitioned memory architectures', ACM Transactions on Embedded Computing Systems (TECS), vol. 7, pp. 1 - 32, http://dx.doi.org/10.1145/1331331.1331336

Vera X; Lisper B; Xue J, 2007, 'Data cache locking for tight timing calculations', ACM Transactions on Embedded Computing Systems (TECS), vol. 7, pp. 1 - 38, http://dx.doi.org/10.1145/1324969.1324973

Xue J; Nguyen PH; Potter J, 2007, 'Interprocedural side-effect analysis for incomplete object-oriented software modules', Journal of Systems and Software, vol. 80, pp. 92 - 105, http://dx.doi.org/10.1016/j.jss.2006.06.015

Li L; Xue J, 2007, 'Trace-based leakage energy optimisations at link time', Journal of Systems Architecture, vol. 53, pp. 1 - 20, http://dx.doi.org/10.1016/j.sysarc.2006.05.002

Li L; Xue J, 2007, 'Trace-based leakage energy optimisations at link time', Journal of Systems Architecture, vol. 53, pp. 1 - 20, http://dx.doi.org/10.1016/j.sysarc.2006.05.002

Xue J; Nguyen PH; Potter JM, 2007, 'Interprocedural side-effect analysis for incomplete object-oriented software modules', Journal of Systems and Software, vol. 80, pp. 92 - 105, http://dx.doi.org/10.1016/j.jss.2006.06.015


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