Select Publications

Conference Papers

Zhang D; Guo HA; Luo B, 2008, 'An algorithm for estimating number of components of Gaussian mixture model based on penalized distance', in 2008 International conference on neural networks and signal processing, Zhenjiang, China, presented at International conference on neural networks and signal processing 2008, Zhenjiang, China, 07 June 2008 - 11 June 2008

Hong M; Guo HA; Luo B, 2008, 'Security Design for Multi-Service Smart Card Systems', in FGCN: PROCEEDINGS OF THE 2008 SECOND INTERNATIONAL CONFERENCE ON FUTUREGENERATION COMMUNICATION AND NETWORKING, VOLS 1 AND 2, Ieee Computer Soc, Los Alamitos

Radhakrishnan S; Guo H; Parameswaran S; Ignjatovic A, 2006, 'Application specific forwarding network and instruction encoding for multi-pipe ASIPs', in CODES+ISSS 2006: Proceedings of the 4th International Conference on Hardware Software Codesign and System Synthesis, pp. 241 - 246, http://dx.doi.org/10.1145/1176254.1176313

Radhakrishnan S; Guo HA; Parameswaran S, 2006, 'Customization of application specific heterogeneous multi-pipeline processors', in 43rd Design automation conference, Munich, Germany, presented at 43rd Design automation conference, Munich, Germany, 06 March 2006 - 10 March 2006

Radhakrishnan S; Hui Guo ; Parameswaran S, 2006, 'Customization of application specific heterogeneous multi-pipeline processors', in Proceedings of the Design Automation & Test in Europe Conference, IEEE, presented at 2006 Design, Automation and Test in Europe, 06 March 2006 - 10 March 2006, http://dx.doi.org/10.1109/date.2006.244094

Guo HA; Parameswaran S, 2005, 'Balancing system level pipelines with stage voltage scaling', in IEEE annual symposium on VLSI, Tampa, Florida, USA, presented at IEEE annual symposium on VLSI, Tampa, Florida, USA, 11 May 2005 - 12 May 2005

Parameswaran S; Guo HA; Radhakrishnan S, 2004, 'Dual-Pipeline Heterogeneous ASIP Design', in CODES + ISSS 2004, Stockholm, Sweden, presented at CODES + ISSS 2004, Stockholm, Sweden, 08 September 2004 - 10 September 2004

Parameswaran S; Guo H, 1997, 'Partitioning of system level pipelines', in Proceedings of the Australian Microelectronics Conference, pp. 233 - 238

Parameswaran S; Guo H, 1997, 'Power reduction in pipelines', in Proceedings of the Australian Microelectronics Conference, pp. 239 - 244

Guo H; Parameswaran S, 1997, 'Unfolding loops with interdetermine count in system level pipelines', in Proceedings of the Australian Microelectronics Conference, pp. 82 - 87

Parameswaran S; Guo H, 1997, 'Power consumption in CMOS combinational logic blocks at high frequencies', in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 195 - 200

Preprints

Yang S; Guo H; Moustafa N, 2021, Hunter in the Dark: Discover Anomalous Network Activity Using Deep Ensemble Network, , http://dx.doi.org/10.48550/arxiv.2105.09157

Wu P; Moustafa N; Yang S; Guo H, 2020, Densely Connected Residual Network for Attack Recognition, , http://dx.doi.org/10.48550/arxiv.2008.02196

Wu P; Guo H; Moustafa N, 2020, Pelican: A Deep Residual Network for Network Intrusion Detection, , http://dx.doi.org/10.48550/arxiv.2001.08523


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