Select Publications
By Dr Hui Guo
Journal articles
2024, 'MP-ORAM: A Novel ORAM Design for Multicore Processor Systems', IEEE Transactions on Dependable and Secure Computing, 21, pp. 3719 - 3733, http://dx.doi.org/10.1109/TDSC.2023.3337114
,2022, 'U7Co 3d impurity energy level mediated photogenerated carriers transfer in Bi
2021, 'COPS: A complete oblivious processing system', Microprocessors and Microsystems, 85, http://dx.doi.org/10.1016/j.micpro.2021.104295
,2019, 'DEFT: Dynamic Fault-Tolerant Elastic scheduling for tasks with uncertain runtime in cloud', Information Sciences, 477, pp. 30 - 46, http://dx.doi.org/10.1016/j.ins.2018.10.020
,2018, 'SP-Partitioner: A novel partition method to handle intermediate data skew in spark streaming', Future Generation Computer Systems, 86, pp. 1054 - 1063, http://dx.doi.org/10.1016/j.future.2017.07.014
,2018, 'A Low-Energy Multi-Threaded Processor Design for Application Specific Embedded Systems', International Journal of Computer & Software Engineering, 3, http://dx.doi.org/10.15344/2456-4451/2018/131
,2017, 'iCETD: An improved tag generation design for memory data authentication in embedded processor systems', Integration, the VLSI Journal, 56, pp. 96 - 104, http://dx.doi.org/10.1016/j.vlsi.2016.10.006
,2016, 'Fault-Tolerant Scheduling for Real-Time Scientific Workflows with Elastic Resource Provisioning in Virtualized Clouds', IEEE Transactions on Parallel and Distributed Systems, 27, pp. 3501 - 3517, http://dx.doi.org/10.1109/TPDS.2016.2543731
,2015, 'Towards energy-efficient scheduling for real-time tasks under uncertain cloud computing environment', Journal of Systems and Software, 99, pp. 20 - 35, http://dx.doi.org/10.1016/j.jss.2014.08.065
,2013, 'Register File Customization for Embedded Multi-Threaded Pipelined Processors', International Journal of Computer Theory and Engineering, 5, pp. 551 - 556, http://dx.doi.org/10.7763/IJCTE.2013.V5.748
,2012, 'Rolling-horizon scheduling for energy constrained distributed real-time embedded systems', Journal of Systems and Software, 85, pp. 780 - 794, http://dx.doi.org/10.1016/j.jss.2011.10.008
,2011, 'An on-chip instruction cache design with one-bit tag for low-power embedded systems', Microprocessors and Microsystems, 35, pp. 382 - 391, http://dx.doi.org/10.1016/j.micpro.2011.02.003
,2009, 'Automatic estimation algorithm of component number of mixture model based on penalized distance', Huanan Ligong Daxue Xuebao/Journal of South China University of Technology (Natural Science), 37, pp. 101 - 107
,2009, 'An efficient segmental bus-invert coding method for instruction memory data bus switching reduction', Eurasip Journal on Embedded Systems, Volume 2009, pp. 1 - 10, http://dx.doi.org/10.1155/2009/973976
,2009, 'Design of Multi-Service Smart Card Systems for High Security and Performance', International Journal of Security and Its Applications, 3, pp. 87 - 100
,2009, 'HMP-ASIP`s: heterogeneous multi-pipeline application-specific instruction-set processors', IET Computers and Digital Techniques, 3, pp. 94 - 108
,1998, 'Power reduction in pipelines', Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 545 - 550
,1998, 'Unrolling loops with indeterminate loop counts in system level pipelines', Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 99 - 104
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