Scheduled Maintenance Notice
Please note that Researcher Profiles will be undergoing scheduled maintenance on Wednesday 7th Oct, from 8:00am to 9:00am. During this time, the Researcher Profiles system will be unavailable. We apologise for any inconvenience and appreciate your understanding.
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Journal articles
, 1997, 'Variable wordlengths in filters with least-squares error criterion', Electronics Letters, 33, pp. 201 - 202, http://dx.doi.org/10.1049/el:19970159
, 1996, 'Variable statistical wordlength in digital filters', IEE Proceedings Vision Image and Signal Processing, 143, pp. 62 - 66, http://dx.doi.org/10.1049/ip-vis:19960256
, 1995, 'General algorithms for reduced-adder integer multiplier design', Electronics Letters, 31, pp. 1800 - 1802, http://dx.doi.org/10.1049/el:19951242
, 1995, 'Use of Minimum-Adder Multiplier Blocks in FIR Digital Filters', IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing, 42, pp. 569 - 577, http://dx.doi.org/10.1109/82.466647
, 1994, 'Multiplier blocks and complexity of IIR structures', Electronics Letters, 30, pp. 1841 - 1842, http://dx.doi.org/10.1049/el:19941288
, 1994, 'Constant integer multiplication using minimum adders', IEE Proceedings Circuits Devices and Systems, 141, pp. 407 - 413, http://dx.doi.org/10.1049/ip-cds:19941191