By Associate Professor Oliver Diessel

Conference Papers

Kuo JY; Ku AK; Xue J; Diessel OF; Malik U, 2008, 'ACS: an addressless configuration support for efficient partial reconfigurations', in International conference on field-programmable technology, Proceedings, Taipei, Taiwan, pp. 161 - 168, presented at International conference on field-programmable technology, Taipei, Taiwan, 07 December 2008 - 10 December 2008

Koh S; Diessel O, 2008, 'The effectiveness of configuration merging in point-to-point networks for module-based FPGA reconfiguration', in Proceedings of the 16th IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM'08, pp. 65 - 76, http://dx.doi.org/10.1109/FCCM.2008.25

Koh S; Diessel OF, 2008, 'The effectiveness of configuration merging in point-to-point networks', in IEEE symposium on field-programmable custom computing machines 2008, Stanford, California, USA, presented at IEEE symposium on field-programmable custom computing machines 2008, Stanford, California, USA, 14 April 2008 - 15 April 2008

Malik MA; Diessel OF; Dempster AG, 2007, 'Fast code-phase alignment of GPS signals using Virtex-4 FPGAs', in IGNSS 2007, UNSW, Sydney, Australia, presented at International Global Navigation Satellite Systems Society 2007, UNSW, Sydney, Australia, 04 December 2007 - 06 December 2007

Koh S; Diessel OF, 2007, 'Module graph merging and placement to reduce reconfiguration overheads in paged FPGA devices', in International Conference on Field Programmable Logic 2007, Amsterdam, Netherlands, presented at International Conference on Field Programmable Logic 2007, Amsterdam, Netherlands, 27 August 2007 - 29 August 2007

Koh S; Diessel OF, 2006, 'Communications Infrastructure Generation for Modular FPGA Reconfiguration', in IEEE International Conference in Field Programmable Technology, Bangkok, Thailand, presented at IEEE International Conference in Field Programmable Technology, Bangkok, Thailand, 13 December 2006 - 15 December 2006

Malik U; Diessel O, 2006, 'The entropy of FPGA reconfiguration', in Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL, pp. 261 - 266, http://dx.doi.org/10.1109/FPL.2006.311223

Koh LW; Diessel OF, 2006, 'Functional unit chaining: a runtime adaptive architecture for reducing bypass delays', in Advances in computer systems architecture, 11th Asia-Pacific conference, Shanghai, China, presented at Advances in computer systems architecture, 11th Asia-Pacific conference, Shanghai, China, 06 September 2006 - 08 September 2006

Malik U; Diessel OF, 2006, 'The enotropy of FPGA reconfiguration', in 2006 International Conference on Field Programming, Madrid, Spain, presented at International Conference on Field Programming 2006, Madrid, Spain, 28 August 2006 - 30 August 2006

Koh S; Diessel OF, 2006, 'COMMA: A Communications Methodology for Dynamic Module Reconfiguration in FPGAs', in IEEE Symposium on Field-Programmable Custom Computing Machines, IEEE Computer Society, New York, NY, United States, presented at IEEE Symposium on Field-Programmable Custom Computing Machines 2006, Napa Valley, California, USA, 24 April 2006 - 26 April 2006

Koh S; Diessel OF, 2006, 'COMMA: a communications methodology for dynamic module-based reconfiguration of FPGAs', in 19th international conference on architecture of computing systems, Frankfurt, Germany, presented at 19th international conference on architecture of computing systems, Frankfurt, Germany, 13 March 2006 - 17 March 2006

Diessel O; Koh S, 2006, 'Enabling RTR for industry', in Dagstuhl Seminar Proceedings, Schloss Dagstuhl-Leibniz-Zentrum für Informatik, Schloss Dagstuhl-Leibniz-Zentrum für Informatik

Malik U; Diessel O, 2006, 'The entropy of FPGA reconfiguration', in 2006 International Conference on Field Programmable Logic and Applications, IEEE, pp. 1 - 6, IEEE

Malik U; Diessel OF; della Torre M, 2005, 'A configuration system architecture supporting bit-stream compression for FPGAs', in 10th Asia-Pacific conference on computer systems architecture, Singapore, presented at 10th Asia-Pacific conference on computer systems architecture, Singapore, 24 October 2005 - 26 October 2005

Malik U; Diessel OF, 2005, 'A configuration memory architecture for fast run-time reconfiguration of FPGAs', in 2005 International conference on field programmable logic (FPL 2005), Finland, presented at International Conference on Field Programmable Logic 2005, Finland, 24 August 2005 - 26 August 2005

Bergmann N; Diessel O, 2004, 'Message from the general chair and program chair', in Proceedings - 2004 IEEE International Conference on Field-Programmable Technology, FPT '04

Malik U; Diessel O, 2004, 'On the placement and granularity of FPGA configurations', in Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on, IEEE, pp. 161 - 168, IEEE

Diessel OF, 2002, 'Towards High-Level Specification, Synthesis, and Virtualization of Programmable Logic Designs', in Monien B; Feldmann R (ed.), Euro-Par 2002, Paderborn Germany, pp. 314 - 317, presented at Euro-Par 2002, Paderborn Germany, 27 August 2002 - 30 August 2002

Malik U; Diessel O, 2002, 'An FPGA interpreter with virtual hardware management', in International Parallel Processing Symposium, Springer, Springer

Guntsch M; Middendorf M; Scheuermann B; Diessel O; ElGindy H; Schmeck H; So K, 2002, 'Population based ant colony optimization on FPGA', in Field-Programmable Technology, 2002.(FPT). Proceedings. 2002 IEEE International Conference on, IEEE, pp. 125 - 132, IEEE

Malik U; So K; Diessel O, 2002, 'Resource-aware run-time elaboration of behavioural FPGA specifications', in Field-Programmable Technology, 2002.(FPT). Proceedings. 2002 IEEE International Conference on, IEEE, pp. 68 - 75, IEEE

Brebner G; Diessel O, 2001, 'Chip-based reconfigurable task management', in International Conference on Field Programmable Logic and Applications, Springer, pp. 182 - 191, Springer

Diessel O; Milne G, 2000, 'Behavioural language compilation with virtual hardware management', in International Workshop on Field Programmable Logic and Applications, Springer, pp. 707 - 717, Springer

Diessel O; Milne G, 2000, 'Compiling process algebraic descriptions into reconfigurable logic', in International Parallel and Distributed Processing Symposium, Springer, pp. 916 - 923, Springer

Diessel O, 2000, 'Operating Systems Support for Dynamically Reconfigurable Architectures', in Dagstuhl Seminar Proceedings, Schloss Dagstuhl-Leibniz-Zentrum für Informatik, Schloss Dagstuhl-Leibniz-Zentrum für Informatik

Diessel O; Kearney D; Wigley G, 1999, 'A web-based multiuser operating system for reconfigurable computing', in International Parallel Processing Symposium, Springer, pp. 579 - 587, Springer

Diessel O; EiGindy H, 1998, 'Partial rearrangements of space-shared FPGAs (Extended abstract)', in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), pp. 913 - 918, http://dx.doi.org/10.1007/3-540-64359-1_755

Diessel O; ElGindy H, 1998, 'On scheduling dynamic FPGA reconfigurations', in Australian Conference on Parallel and Real-Time Systems, Springer, pp. 191 - 200, Springer

Diessel O; ElGindy HA, 1998, 'Partial FPGA rearrangement by local repacking', in FPGA, pp. 259 - 259

Diessel O; ElGindy H, 1998, 'Partial rearrangements of space-shared FPGAs', in International Parallel Processing Symposium, Springer, pp. 913 - 918, Springer

Diessel O; ElGindy H, 1997, 'Run-time compaction of FPGA designs', in International Workshop on Field Programmable Logic and Applications, Springer, pp. 131 - 140, Springer

Diessel O; ElGindy H; Wetherall L, 1996, 'Efficient broadcasting procedures for constrained reconfigurable meshes', in Australasian Conference on Parallel and Real–Time Systems, Citeseer, pp. 85 - 88

Diessel O; ElGindy H; Beresford-Smith B, 1996, 'Partial task compaction reduces queuing delays in partitionable-array machines', in Australasian Conference on Parallel and Real–Time Systems, Citeseer, pp. 186 - 194, Citeseer

Beresford-Smith B; Diessel O; ElGindy H, 1995, 'Optimal algorithms for constrained reconfigurable meshes', in Australian Computer Science Conference, UNIVERSITY OF CANTERBURY, pp. 32 - 41

Beresford-Smith B; Diessel O; ElGindy H, 1994, 'Optimal algorithms for constrained reconfigurable meshes (Extended abstract)', in Australian Transputer and Occam User Group Conference, pp. 28 - 39

Penfold HB; Diessel OF; Bentink MW, 1990, 'A genetic breeding algorithm which exhibits selforganizing in neural networks', in IASTED Int. Symp. Artificial Intelligence Application and Neural Networks, Anaheim, CA: ACTA, pp. 293 - 296, Anaheim, CA: ACTA

Conference Proceedings (Editor of)

Diessel OF; Williams J, (ed.), 2004, 'IEEE Conference on Control Applications', Brisbane, Qld, presented at IEEE Conference on Control Applications, Brisbane, Qld, 06 December 2004 - 08 December 2004

Conference Presentations

Diessel OF, 2015, 'Application, Design & Test of Dynamically Reconfigurable Field-Programmable Gate Array-based Systems', presented at IET/IEEE/EA Joint Institutions Lecture, Engineers Australia, 13 August 2015 - 13 August 2015

Diessel OF, 2015, 'Detecting and Mitigating Radiation-Induced Errors in SRAM-based Field-Programmable Gate Arrays', presented at 12th IEEE International Conference on Electronic Measurement & Instruments (ICEMI’2015), Qingdao, -

Lingkan G; Diessel OF, 2012, 'Simulation-based Functional Verification of Dynamically Reconfigurable Systems', presented at 17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012, Sydney, Australia, 30 January 2012 - 02 February 2012

Diessel OF, 2007, 'Moving Run-Time Reconfiguration into the Mainstream', presented at Microelectonics Embedded Systems Workshop, Singapore, -

Diessel OF, 2006, 'Reconfigurable computing', presented at Infocommm Development Authority of Singapore, -

Diessel OF; Engel F; Percival T; Temperley N, 2005, 'Reconfigurable Computing Workshop', presented at Reconfigurable Computing Workshop, National ICT Australia, -

Diessel OF, 2003, 'Towards High-Level Specification & Synthesis of Dynamic Process Logic', presented at Dynamic Straming Architectures Workshop, Caltech, -

Back to profile page