Select Publications

Conference Papers

Hussain M; Malekpour A; Guo H; Parameswaran S, 2018, 'EETD: An energy efficient design for runtime hardware trojan detection in untrusted network-on-chip', in Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, pp. 345 - 350, http://dx.doi.org/10.1109/ISVLSI.2018.00070

Irena F; Murphy D; Parameswaran S, 2018, 'CryptoBlaze: A partially homomorphic processor with multiple instructions and non-deterministic encryption support', in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 702 - 708, http://dx.doi.org/10.1109/ASPDAC.2018.8297404

Gnanasambandapillai V; Bayat A; Parameswaran S, 2018, 'MESGA: An MPSoC based embedded system solution for short read genome alignment', in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 52 - 57, http://dx.doi.org/10.1109/ASPDAC.2018.8297282

Saadat H; Parameswaran S, 2017, 'Special session: Hardware approximate computing: How, why, when and where?', in Proceedings of the 2017 International Conference on Compilers, Architectures and Synthesis for Embedded Systems Companion, CASES 2017, http://dx.doi.org/10.1145/3125501.3125518

Malekpour A; Ragel R; Ignjatovic A; Parameswaran S, 2017, 'DoSGuard: Protecting pipelined MPSoCs against hardware Trojan based DoS attacks', in Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors, Seattle, WA, USA, pp. 45 - 52, presented at 2017 IEEE 28th International Conference on Application-specific Systems, Architectures and Processors (ASAP), Seattle, WA, USA, 10 July 2017 - 12 July 2017, http://dx.doi.org/10.1109/ASAP.2017.7995258

Malekpour A; Ragel R; Ignjatovic A; Parameswaran S, 2017, 'TrojanGuard: Simple and Effective Hardware Trojan Mitigation Techniques for Pipelined MPSoCs', in Proceedings - Design Automation Conference, http://dx.doi.org/10.1145/3061639.3062336

Ignjatovic A; Jayasinghe D; Parameswaran S, 2017, 'NORA: Algorithmic Balancing without Pre-charge to Thwart Power Analysis Attacks', in VLSI Design 2017, Hyderabad, India, pp. 167 - 172, presented at 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, VLSID 2017, Hyderabad, India, 07 January 2017 - 11 January 2017, http://dx.doi.org/10.1109/VLSID.2017.25

Nemati N; Reed MC; Parameswaran S; Fant K, 2017, 'Self-Timed automatic test pattern generation for null convention logic', in Midwest Symposium on Circuits and Systems, http://dx.doi.org/10.1109/MWSCAS.2016.7870032

Liu T; Guo H; Parameswaran S; Hu XS, 2016, 'Improving tag generation for memory data authentication in embedded processor systems', in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 50 - 55, http://dx.doi.org/10.1109/ASPDAC.2016.7427988

Aluthwala P; Weste N; Adams A; Lehmann T; Parameswaran S, 2016, 'The effect of amplitude resolution and mismatch on a digital-to-analog converter used for digital harmonic-cancelling sine-wave synthesis', in Proceedings - IEEE International Symposium on Circuits and Systems, IEEE, Montreal, CANADA, pp. 2018 - 2021, presented at IEEE International Symposium on Circuits and Systems (ISCAS), Montreal, CANADA, 22 May 2016 - 25 May 2016, http://dx.doi.org/10.1109/ISCAS.2016.7538973

Jayasinghe JA; Shivam Bashin ; Parameswaran S; Ignjatovic A, 2016, 'Does It Sound as It Claims: A Detailed Side-Channel Security Analysis of QuadSeal Countermeasure', in 2016 ACM International Conference on Computing Frontiers - Proceedings, Como, Italy, pp. 449 - 454, presented at ACM International Conference on Computing Frontiers 2016, Como, Italy, 16 May 2016 - 18 May 2016, http://dx.doi.org/10.1145/2903150.2911709

Li T; Ambrose JA; Parameswaran S, 2016, 'RECORD: Reducing register traffic for checkpointing in embedded processors', in Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016, pp. 582 - 587

Bokhari H; Parameswaran SRI; Shafique M; Garg S; Khan MUK; Khdr H; Kriebel F; Ogras UY; Henkel J, 2015, 'Dark Silicon: From Computation to Communication', in Proceedings - 2015 9th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2015, Vancouver, Canada, presented at 9th International Symposium on Networks-on-Chip (NoC'15), Vancouver, Canada, 28 September 2015 - 30 September 2015, http://dx.doi.org/10.1145/2786572.2788707

Jayasinghe D; Ignjatovic A; Ambrose JA; Ragel R; Parameswaran S, 2015, 'QuadSeal: Quadruple algorithmic symmetrizing countermeasure against power based side-channel attacks', in 2015 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2015, pp. 21 - 30, http://dx.doi.org/10.1109/CASES.2015.7324539

Ambrose JA; Yachide Y; Batra K; Peddersen JMD; Parameswaran S, 2015, 'Sequential C-code to Distributed Pipelined Heterogeneous MPSoC Synthesis for Streaming Applications', in Proceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015, New York, NY, USA, pp. 216 - 223, presented at IEEE International Conference on Computer Design (ICCD), New York, NY, USA, 18 October 2015 - 21 October 2015, http://dx.doi.org/10.1109/ICCD.2015.7357106

Shwe S; Batra K; Yachide Y; Peddersen JM; Parameswaran S, 2015, 'RAPITIMATE: Rapid performance estimation of pipelined processing systems containing shared memory', in Proceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015, New York, NY, USA, pp. 635 - 642, presented at IEEE International Conference on Computer Design (ICCD), New York, NY, USA, 18 October 2015 - 21 October 2015, http://dx.doi.org/10.1109/ICCD.2015.7357175

Zhang X; Java H; Shafique M; Peddersen J; Henkel JO; Parameswaran S, 2015, 'E-pipeline: Elastic Hardware/Software Pipelines on a Many-Core Fabric', in DATE 15, Grenoble, France, pp. 363 - 368, presented at DATE 15, Grenoble, France, 09 March 2015 - 13 March 2015

Bokhari H; Javaid H; Shafique M; Henkel J; Parameswaran S, 2015, 'Malleable NoC: Dark silicon inspired adaptable Network-on-Chip', in Proceedings -Design, Automation and Test in Europe, DATE, pp. 1245 - 1248

Tang L; Ambrose JA; Kumar A; Parameswaran S, 2015, 'Dynamic reconfigurable puncturing for secure wireless communication', in Proceedings -Design, Automation and Test in Europe, DATE, pp. 888 - 891

Aluthwala PD; Lehmann T; Parameswaran S, 2015, 'Design of a Digital Harmonic-Cancelling Sine-Wave Synthesizer with 100 MHz Output Frequency, 43.5 dB SFDR, and 2.26 mW Power', in Proceedings - IEEE International Symposium on Circuits and Systems, Institute of Electrical and Electronics Engineers, Lisbon, Portugal, pp. 3052 - 3055, presented at International Symposium on Circuits and Systems, Lisbon, Portugal, 24 May 2015 - 27 May 2015, http://dx.doi.org/10.1109/ISCAS.2015.7169331

Ambrose JA; Higgins N; Chakravarthy M; Garg S; Li T; Murphy D; Ignjatovic A; Parameswaran S, 2015, 'ARCHER: Communication-based predictive architecture selection for application specific multiprocessor Systems-on-Chip', in Proceedings - IEEE International Symposium on Circuits and Systems, pp. 413 - 416, http://dx.doi.org/10.1109/ISCAS.2015.7168658

Bokhari H; Javaid H; Shafique M; Henkel J; Parameswaran S, 2015, 'SuperNet: Multimode interconnect architecture for manycore chIPs', in Proceedings - Design Automation Conference, http://dx.doi.org/10.1145/2744769.2744912

Ambrose JA; Ragel RG; Jayasinghe D; Li T; Parameswaran S, 2015, 'Side channel attacks in embedded systems: A tale of hostilities and deterrence', in Proceedings - International Symposium on Quality Electronic Design, ISQED, pp. 452 - 459, http://dx.doi.org/10.1109/ISQED.2015.7085468

Ambrose JA; Li T; Murphy D; Gargg S; Higgins N; Parameswaran S, 2015, 'ARGUS: A Framework for Rapid Design and Prototype of Heterogeneous Multicore Systems in FPGA', in Proceedings of the IEEE International Conference on VLSI Design, pp. 29 - 34, http://dx.doi.org/10.1109/VLSID.2015.10

Zhang X; Haris J; Muhammad S; Jude Angelo A; Jörg H; Sri P, 2015, 'ADAPT: An ADAptive Manycore Methodology for Software Pipelined ApplicaTions', in 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, pp. 701 - 706, presented at 20th Asia and South Pacific Design Automation Conference, 19 January 2015 - 22 January 2015, http://dx.doi.org/10.1109/ASPDAC.2015.7059092

Schneider JL; Pedersen J; Parameswaran S, 2015, 'Speeding Up Single Pass Simulation of PLRUt Caches', in 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, pp. 695 - 700, presented at 2015 20th Asia and South Pacific Design Automation Conference, 19 January 2015 - 22 January 2015, http://dx.doi.org/10.1109/ASPDAC.2015.7059091

Jayasinghe D; Ragel R; Ambrose JA; Ignjatovic A; Parameswaram S, 2014, 'Advanced Modes in AES: Are they Safe from Power Analysis based Side Channel Attacks?', in 2014 32nd IEEE International Conference on Computer Design, ICCD 2014, Seoul, Korea, pp. 173 - 180, presented at IEEE International Conference on Computer Design, Seoul, Korea, 19 October 2014 - 22 October 2014, http://dx.doi.org/10.1109/ICCD.2014.6974678

Parameswaran S, 2014, 'Mapping programs for execution on pipelined MPSoCs', in 2014 IEEE 12th Symposium on Embedded Systems for Real-Time Multimedia, ESTIMedia 2014, pp. 11, http://dx.doi.org/10.1109/ESTIMedia.2014.6962340

Tang L; Ambrose JA; Parameswaran S; Zhu S, 2014, 'Reconfigurable convolutional codec for physical layer communication security application', in Proceedings - IEEE Military Communications Conference MILCOM, pp. 82 - 87, http://dx.doi.org/10.1109/MILCOM.2014.21

Shafique M; Garg S; Mitra T; Parameswaran S; Henkel J, 2014, 'Dark silicon as a challenge for hardware/software co-design', in 2014 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2014, http://dx.doi.org/10.1145/2656075.2661645

Aluthwala P; Weste N; Adams A; Lehmann T; Parameswaran S, 2014, 'A simple digital architecture for a harmonic-cancelling sine-wave synthesizer', in Proceedings - IEEE International Symposium on Circuits and Systems, pp. 2113 - 2116, http://dx.doi.org/10.1109/ISCAS.2014.6865584

Javaid H; Yachide Y; Shwe SMM; Bokhari H; Parameswaran S, 2014, 'FALCON: A Framework for HierarchicAL Computation of Metrics for CompONent-Based Parameterized SoCs', in Proceedings of the The 51st Annual Design Automation Conference on Design Automation Conference, ACM, pp. 33:1 - 33:6, http://dx.doi.org/10.1145/2593069.2593138

Bokhari H; Javaid H; Shafique M; Henkel J; Parameswaran S, 2014, 'Darknoc: Designing energyefficient networkonchip with multivt cells for dark silicon', in Proceedings - Design Automation Conference, http://dx.doi.org/10.1145/2593069.2593117

Nawinne I; Schneider J; Javaid H; Parameswaran S, 2014, 'Hardware-based fast exploration of cache hierarchies in application specific MPSoCs', in Proceedings -Design, Automation and Test in Europe, DATE, http://dx.doi.org/10.7873/DATE2014.296

Schneider JL; Peddersen J; Parameswaran S, 2014, 'A Scorchingly Fast FPGA-Based Precise L1 LRU Cache Simulator', in Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC 2014), IEEE, Singapore, pp. 412 - 417, presented at 2014 19th Asia and South Pacific Design Automation Conference, Singapore, 20 January 2014 - 23 January 2014, http://dx.doi.org/10.1109/ASPDAC.2014.6742926

Ambrose JA; Peddersen J; Parameswaran S; Labios A; Yachide Y, 2014, 'SDG2KPN: System Dependency Graph to function-level KPN generation of legacy code for MPSoCs', in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 267 - 273, http://dx.doi.org/10.1109/ASPDAC.2014.6742901

Schneider JL; Peddersen J; Parameswaran S, 2014, 'MASH{fifo}: A Hardware-Based Multiple Cache Simulator for Rapid FIFO Cache Analysis', in Proceedings of the The 51st Annual Design Automation Conference, ACM New York, NY, USA, San Francisco, California, USA, pp. 1 - 6, presented at The 51st Annual Design Automation Conference, San Francisco, California, USA, 01 June 2014 - 05 June 2014, http://dx.doi.org/10.1145/2593069.2593159

Doan HC; Javaid H; Parameswaran S, 2014, 'Flexible and Scalable Implementation of H.264/AVC Encoder for Multiple Resolutions Using ASIPs', in Preas K (ed.), Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014, Institute of Electrical and Electronics Engineers ( IEEE ), Dresden, Germany, pp. 1791 - 1796, presented at DATE, Dresden, Germany, 24 March 2014 - 28 March 2014, http://dx.doi.org/10.7873/DATE2014.366

Amrouch H; Ebi T; Schneider JL; Parameswaran S; Henkel J, 2013, 'Analyzing the thermal hotspots in FPGA-based embedded systems', in 2013 23rd International Conference on Field Programmable Logic and Applications (FPL 2013), Porto, Portugal, presented at 23rd International Conference on Field Programmable Logic and Applications (FPL), 2013, Porto, Portugal, 02 September 2013 - 04 September 2013, http://dx.doi.org/10.1109/FPL.2013.6645567

Ambrose JA; Cassisi V; Murphy D; Li T; Jayasinghe D; Parameswaran S, 2013, 'Scalable performance monitoring of application specific multiprocessor Systems-on-Chip', in 2013 IEEE 8th International Conference on Industrial and Information Systems, ICIIS 2013 - Conference Proceedings, pp. 315 - 320, http://dx.doi.org/10.1109/ICIInfS.2013.6732002

Nawinne I; Parameswaran S, 2013, 'A survey on exact cache design space exploration methodologies for application specific SoC memory hierarchies', in 8th IEEE International Conference on Industrial and Information Systems (ICIIS), 2013 - Conference Proceedings, IEEE, IEEE Xplore, pp. 332 - 337, presented at 8th IEEE International Conference on Industrial and Information Systems (ICIIS), 2013, Peradeniya, Sri Lanka, 17 December 2013 - 20 December 2013, http://dx.doi.org/10.1109/ICIInfS.2013.6732005

Bokhari H; Javaid H; Parameswaran S, 2013, 'System-level optimization of on-chip communication using express links for throughput constrained MPSoCs', in ESTIMedia 2013 - 11th IEEE Symposium on Embedded Systems for Real-Time Multimedia, pp. 68 - 77, http://dx.doi.org/10.1109/ESTIMedia.2013.6704505

Muthukaruppan TS; Javaid H; Mitra T; Parameswaran S, 2013, 'Energy-aware synthesis of application specific MPSoCs', in 2013 IEEE 31st International Conference on Computer Design, ICCD 2013, pp. 62 - 69, http://dx.doi.org/10.1109/ICCD.2013.6657026

Henkel J; Narayanan V; Parameswaran S; Teich J, 2013, 'Run-time adaption for highly-complex multi-core systems', in 2013 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2013, http://dx.doi.org/10.1109/CODES-ISSS.2013.6659000

Min SM; Javaid H; Ignjatovic A; Parameswaran S, 2013, 'A case study on exploration of last-level cache for energy reduction in DDR3 DRAM', in Proceedings - 2013 2nd Mediterranean Conference on Embedded Computing, MECO 2013, pp. 42 - 45, http://dx.doi.org/10.1109/MECO.2013.6601372

Ambrose JA; Ignjatovic A; Parameswaran S, 2012, 'CoRaS: A multiprocessor key corruption and random round swapping for power analysis side channel attacks: A des case study', in ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems, pp. 253 - 256, http://dx.doi.org/10.1109/ISCAS.2012.6271818

Haque S; Ragel RG; Ambrose JA; Radhakrishnan S; Parameswaran S, 2012, 'DIMSim: A Rapid Two-level Cache Simulation Approach for Deadline-based MPSoCs', in The International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)), ACM, New York, USA, pp. 151 - 160, presented at The International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)), Tampere, Finland, http://dx.doi.org/10.1145/2380445.2380473

Li T; Ambrose JA; Parameswaran S, 2012, 'Fine-grained Hardware/Software Methodology for Process Migration in MPSoCs', in International Conference on Computer Aided Design (ICCAD), ACM, New York, USA, pp. 508 - 515, presented at IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, USA, 05 November 2012 - 08 November 2012

Min SM; Peddersen J; Parameswaran S, 2011, 'Realizing cycle accurate processor memory simulation via interface abstraction', in Proceedings of the IEEE International Conference on VLSI Design, pp. 141 - 146, http://dx.doi.org/10.1109/VLSID.2011.36

Javaid H; Shafique M; Parameswaran S; Henkel J, 2011, 'Low-power adaptive pipelined MPSoCs for multimedia: An H.264 video encoder case study', in Proceedings - Design Automation Conference, Institute of Electrical and Electronics Engineers Inc.,, San Diego, CA, United states, pp. 1032 - 1037, presented at 2011 48th ACM/EDAC/IEEE Design Automation Conference, DAC 2011, San Diego, CA, United states, 05 June 2011 - 09 June 2011


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