Select Publications
Journal articles
1995, 'Closed-form mapping conditions for the synthesis of linear processor arrays', Journal of VLSI signal processing systems for signal, image and video technology, 10, pp. 181 - 199, http://dx.doi.org/10.1007/BF02407035
,1994, 'Automating non-unimodular loop transformations for massive parallelism', Parallel Computing, 20, pp. 711 - 728, http://dx.doi.org/10.1016/0167-8191(94)90002-7
,1992, 'A systolic array for pyramidal algorithms', Journal of VLSI Signal Processing, 4, pp. 89, http://dx.doi.org/10.1007/BF00930620
,1992, 'ON THE LOADING, RECOVERY AND ACCESS OF STATIONARY DATA IN SYSTOLIC ARRAYS', LECTURE NOTES IN COMPUTER SCIENCE, 634, pp. 259 - 264, https://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&KeyUT=WOS:A1992KQ20400031&DestLinkType=FullRecord&DestApp=ALL_WOS&UsrCustomerID=891bb5ab6ba270e68a29b250adbe88d1
,1992, 'The synthesis of control signals for one-dimensional systolic arrays', Integration, the VLSI Journal, 14, pp. 1 - 32, http://dx.doi.org/10.1016/0167-9260(92)90008-M
,1991, 'A systolic array for pyramidal algorithms', Journal of VLSI signal processing systems for signal, image and video technology, 3, pp. 237 - 257, http://dx.doi.org/10.1007/BF00925834
,1991, 'SPECIFYING CONTROL SIGNALS FOR SYSTOLIC ARRAYS BY UNIFORM RECURRENCE EQUATIONS', Parallel Processing Letters, 01, pp. 83 - 93, http://dx.doi.org/10.1142/S0129626491000033
,1988, 'A new data structure for representing cell hierarchy in layout design', Computers & Graphics, 12, pp. 341 - 348, http://dx.doi.org/10.1016/0097-8493(88)90055-6
,Conference Papers
2025, 'UnsafeCop: Towards Memory Safety for Real-World Unsafe Rust Code with Practical Bounded Model Checking', in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), pp. 307 - 324, http://dx.doi.org/10.1007/978-3-031-71177-0_19
,2024, 'A CFL-Reachability Formulation of Callsite-Sensitive Pointer Analysis with Built-In On-The-Fly Call Graph Construction', in Leibniz International Proceedings in Informatics, LIPIcs, http://dx.doi.org/10.4230/LIPIcs.ECOOP.2024.18
,2024, 'Optimizing Dynamic-Shape Neural Networks on Accelerators via On-the-Fly Micro-Kernel Polymerization', in International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS, pp. 797 - 812, http://dx.doi.org/10.1145/3620665.3640390
,2024, 'A Context-Sensitive Pointer Analysis Framework for Rust and Its Application to Call Graph Construction', in CC 2024 - Proceedings of the 33rd ACM SIGPLAN International Conference on Compiler Construction, pp. 60 - 72, http://dx.doi.org/10.1145/3640537.3641574
,2024, 'Enabling Efficient Large Recommendation Model Training with Near CXL Memory Processing', in Proceedings - International Symposium on Computer Architecture, pp. 382 - 395, http://dx.doi.org/10.1109/ISCA59077.2024.00036
,2023, 'Statistical Type Inference for Incomplete Programs', in ESEC/FSE 2023 - Proceedings of the 31st ACM Joint Meeting European Software Engineering Conference and Symposium on the Foundations of Software Engineering, pp. 720 - 732, http://dx.doi.org/10.1145/3611643.3616283
,2023, 'Hybrid Inlining: A Framework for Compositional and Context-Sensitive Static Analysis', in ISSTA 2023 - Proceedings of the 32nd ACM SIGSOFT International Symposium on Software Testing and Analysis, pp. 114 - 126, http://dx.doi.org/10.1145/3597926.3598042
,2023, 'Reducing the Memory Footprint of IFDS-Based Data-Flow Analyses using Fine-Grained Garbage Collection', in ISSTA 2023 - Proceedings of the 32nd ACM SIGSOFT International Symposium on Software Testing and Analysis, pp. 101 - 113, http://dx.doi.org/10.1145/3597926.3598041
,2023, 'Accelerating Personalized Recommendation with Cross-level Near-Memory Processing', in Proceedings - International Symposium on Computer Architecture, pp. 924 - 936, http://dx.doi.org/10.1145/3579371.3589101
,2023, 'Occamy: Elastically Sharing a SIMD Co-processor across Multiple CPU Cores', in International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS, pp. 483 - 497, http://dx.doi.org/10.1145/3582016.3582046
,2023, 'AFaVS: Accurate Yet Fast Version Switching for Graph Processing Systems', in Proceedings - International Conference on Data Engineering, pp. 53 - 66, http://dx.doi.org/10.1109/ICDE55515.2023.00012
,2023, 'Automatic Generation and Reuse of Precise Library Summaries for Object-Sensitive Pointer Analysis', in Proceedings - 2023 38th IEEE/ACM International Conference on Automated Software Engineering, ASE 2023, pp. 736 - 747, http://dx.doi.org/10.1109/ASE56229.2023.00039
,2023, 'Merge-Replay: Efficient IFDS-Based Taint Analysis by Consolidating Equivalent Value Flows', in Proceedings - 2023 38th IEEE/ACM International Conference on Automated Software Engineering, ASE 2023, pp. 319 - 331, http://dx.doi.org/10.1109/ASE56229.2023.00027
,2023, 'RSFuzzer: Discovering Deep SMI Handler Vulnerabilities in UEFI Firmware with Hybrid Fuzzing', in Proceedings - IEEE Symposium on Security and Privacy, pp. 2155 - 2169, http://dx.doi.org/10.1109/SP46215.2023.10179421
,2023, 'Two Birds with One Stone: Multi-Derivation for Fast Context-Free Language Reachability Analysis', in Proceedings - 2023 38th IEEE/ACM International Conference on Automated Software Engineering, ASE 2023, pp. 624 - 636, http://dx.doi.org/10.1109/ASE56229.2023.00118
,2022, 'Qilin: A New Framework For Supporting Fine-Grained Context-Sensitivity in Java Pointer Analysis', in Leibniz International Proceedings in Informatics, LIPIcs, http://dx.doi.org/10.4230/LIPIcs.ECOOP.2022.30
,2022, 'Finding SMM Privilege-Escalation Vulnerabilities in UEFI Firmware with Protocol-Centric Static Analysis', in 43RD IEEE SYMPOSIUM ON SECURITY AND PRIVACY (SP 2022), IEEE COMPUTER SOC, CA, San Francisco, pp. 1623 - 1637, presented at 43rd IEEE Symposium on Security and Privacy (SP), CA, San Francisco, 23 May 2022 - 26 May 2022, http://dx.doi.org/10.1109/SP46214.2022.00141
,2022, 'A dynamic analysis tool for memory safety based on smart status and source-level instrumentation', in Proceedings of the ACM/IEEE 44th International Conference on Software Engineering: Companion Proceedings, ACM, pp. 6 - 10, presented at ICSE '22: 44th International Conference on Software Engineering, http://dx.doi.org/10.1145/3510454.3516872
,2022, 'Recovering Container Class Types in C++ Binaries', in CGO 2022 - Proceedings of the 2022 IEEE/ACM International Symposium on Code Generation and Optimization, Institute of Electrical and Electronics Engineers (IEEE), pp. 131 - 143, presented at 2022 IEEE/ACM International Symposium on Code Generation and Optimization (CGO), 02 April 2022 - 06 April 2022, http://dx.doi.org/10.1109/CGO53902.2022.9741274
,2022, 'A Data-Centric Accelerator for High-Performance Hypergraph Processing', in Proceedings of the Annual International Symposium on Microarchitecture, MICRO, pp. 1326 - 1341, http://dx.doi.org/10.1109/MICRO56248.2022.00088
,2022, 'A Dynamic Analysis Tool for Memory Safety Based on Smart Status and Source-Level Instrumentation', in Proceedings - International Conference on Software Engineering, pp. 6 - 10, http://dx.doi.org/10.1109/ICSE-Companion55297.2022.9793834
,2022, 'Accelerating Graph Convolutional Networks Using Crossbar-based Processing-In-Memory Architectures', in Proceedings - International Symposium on High-Performance Computer Architecture, pp. 1029 - 1042, http://dx.doi.org/10.1109/HPCA53966.2022.00079
,2022, 'Finding SMM Privilege-Escalation Vulnerabilities in UEFI Firmware with Protocol-Centric Static Analysis', in Proceedings - IEEE Symposium on Security and Privacy, pp. 1623 - 1637, http://dx.doi.org/10.1109/SP46214.2022.9833723
,2022, 'M3V: Multi-modal Multi-view Context Embedding for Repair Operator Prediction', in CGO 2022 - Proceedings of the 2022 IEEE/ACM International Symposium on Code Generation and Optimization, pp. 266 - 277, http://dx.doi.org/10.1109/CGO53902.2022.9741261
,2022, 'ScalaGraph: A Scalable Accelerator for Massively Parallel Graph Processing', in Proceedings - International Symposium on High-Performance Computer Architecture, pp. 199 - 212, http://dx.doi.org/10.1109/HPCA53966.2022.00023
,2021, 'Runtime detection of memory errors with smart status', in ISSTA 2021 - Proceedings of the 30th ACM SIGSOFT International Symposium on Software Testing and Analysis, pp. 296 - 308, http://dx.doi.org/10.1145/3460319.3464807
,2021, 'Accelerating object-sensitive pointer analysis by exploiting object containment and reachability', in Leibniz International Proceedings in Informatics, LIPIcs, http://dx.doi.org/10.4230/LIPIcs.ECOOP.2021.16
,2021, 'GoBench: A Benchmark Suite of Real-World Go Concurrency Bugs', in CGO 2021 - Proceedings of the 2021 IEEE/ACM International Symposium on Code Generation and Optimization, pp. 187 - 199, http://dx.doi.org/10.1109/CGO51591.2021.9370317
,2021, 'Unleashing the Low-Precision Computation Potential of Tensor Cores on GPUs', in CGO 2021 - Proceedings of the 2021 IEEE/ACM International Symposium on Code Generation and Optimization, pp. 90 - 102, http://dx.doi.org/10.1109/CGO51591.2021.9370335
,2021, 'Context Debloating for Object-Sensitive Pointer Analysis', in Proceedings - 2021 36th IEEE/ACM International Conference on Automated Software Engineering, ASE 2021, pp. 79 - 91, http://dx.doi.org/10.1109/ASE51524.2021.9678880
,2021, 'Detecting TensorFlow Program Bugs in Real-World Industrial Environment', in Proceedings - 2021 36th IEEE/ACM International Conference on Automated Software Engineering, ASE 2021, pp. 55 - 66, http://dx.doi.org/10.1109/ASE51524.2021.9678891
,2020, 'A locality-aware energy-efficient accelerator for graph mining applications', in Proceedings of the Annual International Symposium on Microarchitecture, MICRO, pp. 895 - 907, http://dx.doi.org/10.1109/MICRO50266.2020.00077
,2020, 'Correlating ui contexts with sensitive api calls: Dynamic semantic extraction and analysis', in Proceedings - International Symposium on Software Reliability Engineering, ISSRE, pp. 241 - 252, http://dx.doi.org/10.1109/ISSRE5003.2020.00031
,2020, 'Exposing android event-based races by selective branch instrumentation', in Proceedings - International Symposium on Software Reliability Engineering, ISSRE, pp. 265 - 276, http://dx.doi.org/10.1109/ISSRE5003.2020.00033
,2020, 'Loop2Recursion: Compiler-Assisted Wear Leveling for Non-Volatile Memory', in Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors, pp. 581 - 588, http://dx.doi.org/10.1109/ICCD50377.2020.00102
,2020, 'Bandwidth-aware loop tiling for DMA-supported scratchpad memory', in Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT, pp. 97 - 109, http://dx.doi.org/10.1145/3410463.3414637
,2020, 'VTensor: Using virtual tensors to build a layout-oblivious AI programming framework', in Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT, pp. 345 - 346, http://dx.doi.org/10.1145/3410463.3414664
,2020, 'Every Mutation Should Be Rewarded: Boosting Fault Localization with Mutated Predicates', in Proceedings - 2020 IEEE International Conference on Software Maintenance and Evolution, ICSME 2020, Institute of Electrical and Electronics Engineers (IEEE), ELECTR NETWORK, pp. 196 - 207, presented at 2020 IEEE International Conference on Software Maintenance and Evolution (ICSME), ELECTR NETWORK, 27 September 2020 - 03 October 2020, http://dx.doi.org/10.1109/ICSME46990.2020.00028
,2020, 'Burn after reading: A shadow stack with microsecond-level runtime rerandomization for protecting return addresses', in Proceedings - International Conference on Software Engineering, Association for Computing Machinery (ACM), ELECTR NETWORK, pp. 258 - 270, presented at Proceedings of the ACM/IEEE 42nd International Conference on Software Engineering, ELECTR NETWORK, 27 June 2020 - 19 July 2020, http://dx.doi.org/10.1145/3377811.3380439
,2020, 'Message from the Chairs', in Proceedings of the ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), pp. III
,2020, 'A Heterogeneous PIM Hardware-Software Co-Design for Energy-Efficient Graph Processing', in Proceedings - 2020 IEEE 34th International Parallel and Distributed Processing Symposium, IPDPS 2020, pp. 684 - 695, http://dx.doi.org/10.1109/IPDPS47924.2020.00076
,2020, 'Spara: An Energy-Efficient ReRAM-Based Accelerator for Sparse Graph Analytics Applications', in Proceedings - 2020 IEEE 34th International Parallel and Distributed Processing Symposium, IPDPS 2020, pp. 696 - 707, http://dx.doi.org/10.1109/IPDPS47924.2020.00077
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